]
"An Instruction-Level Methodology for Power Estimation and Optimization of Embedded VLIW cores",
DATE 2002, Paris, pp. 1128, March 4-8, 2002.
"Instruction Set Extensions for secure applications",
Design, Automation Test in Europe Conference DATE 2016, Dresden, Germany, IEEE, pp. 1529-1534, 03/2016.
"An industrial design space exploration framework for supporting run-time resource management on multi-core systems",
Proceedings of Design, Automation and Test in Europe (DATE) Conference, Dresden, Germany, March, 2010.
"An Incremental Change Detection Test Based on Density Difference Estimation",
IEEE Transactions on Systems, Man, and Cybernetics: Systems, vol. 47, pp. 2714-2726, Oct, 2017.
"An improved Hilbert-Huang Transform for non-linear and time-variant signals",
26th Italian Workshop on Neural Networks (WIRN 2016), Vietri sul Mare, Salerno, Italy, pp. 1-8, 05/2016.
"Implementation of a Reconfigurable Data Protection Module for NoC-based MPSoCs",
Proceedings of the 21st IPDPS 2007 Reconfigurable Architecture Workshop (RAW), 21th IEEE International Parallel and Distributed Processing Symposium, Miami, USA/FL, April, 2008.
"Impact of Failure Prediction on Availability: Modeling and Comparative Analysis of Predictive and Reactive Methods",
IEEE Transactions on Dependable and Secure Computing, pp. 1-1, 2018.
"High-Level Synthesis of Benevolent Trojans",
Proceedings of the IEEE Design, Automation and Test in Europe Conference (DATE), 2019.
"High-level Architecture of an IPSec-dedicated System on Chip",
proceedings of NGI 2007, Trondheim, Norway, IEEE Press, May, 2007.
"Hierarchical Multi-Agent Protection System for NoC based MPSoCs",
Proceedings of the International Workshop on Security and Dependability for Resource Constrained Embedded Systems (SD4RCES 2010), Vienna, Austria, September 14, 2010.
"Harvesting the potential of nano-CMOS for lightweight cryptography: An ultra-low-voltage 65 nm AES coprocessor for passive RFID tags",
Springer Journal of Cryptographic Engineering, vol. 1, issue 1, 2011.
"Hardware/software partitioning of operating systems: a behavioral synthesis approach",
GLSVLSI '06: Proceedings of the 16th ACM Great Lakes symposium on VLSI, Philadelphia, PA, USA, ACM Press, New York, USA, pp. 324–329, 2006.
"Hardware/Software Partitioning and Interface Synthesis in Networks On Chip",
IP Based SoC Design 2005, Grenoble, France, December 7-8, 2005.
"HardwareScheduling Support in SMP Architecture",
Design, Automation and Test in Europe(DATE), Nice, France, April 16-20, 2007.
"Hardware-assisted Security Enhanced Linux in Embedded Systems: a Proposal",
Proceedings of the 5th Workshop on Embedded Systems Security (WESS'2010), Scottsdale, Arizona, USA, October 24, 2010.
"Hardware Trojans for Inducing or Amplifying Side-Channel Leakage of Cryptographic Software",
2nd International Conference on Trusted Systems (INTRUST), Beijing, China, December, 2010.
Hardware Security and Trust: Design and Deployment of Integrated Circuits in a Threatened Environment,
, First edition; 2016: Springer, 2017.
Hardware scheduled SMP architectures,
, no. US 11/947,278, 06/2008.
"Hardware Implementation of the Rijndael Sbox: a Case Study",
ST Journal of System Research, pp. 84-91, July, 2003.
"Gradual Adaptation of Security for Sensor Networks",
IEEE WoWMoM 2010: Proceedings of the IEEE International Symposium on a World of Wireless Mobile and Multimedia Networks, Montreal, Canada, June 13, 2010.