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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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Author Title Type [ Year(Desc)]
Otero, J., F. Regazzoni, and M. Lajolo, "Rapid Creation of Application Models from Bandwidth Aware Core Graphs", Proceedings of: IP Based SoC Design 2007, Grenoble, France, December 5-6, 2007.
Paolieri, M., I. Bonesana, and M D. Santambrogio, "ReCPU: a Parallel and Pipelined Architecture for Regular Expression Matching", Proceedings of 15th Annual IFIP International Conference on Very Large Scale Integration {(IFIP-VLSI 07)},(best paper award), Atlanta, Georgia, USA, October 15-17, 2007.
Salvioni, C., and A V. Taddeo, "Remote Cooperation on Project-centred Learning: a Working Implemented Solution in Academia", COOPER Workshop in conjunction with EC-TEL07 Conference, September 17, 2007.
Bozzon, A., T. Iofciu, W. Nejdl, A V. Taddeo, and S. Tonnies, "Role Based Access Control for the interaction with Search Engines", COOPER Workshop in conjunction with EC-TEL07 Conference, September 17, 2007.
Mura, M., and M. Paolieri, "SC2: State Charts to System C: Automatic Executable Models Generation", proceedings FDL07, Barcelona, Spain, September, 2007.
Taddeo, A V., and A. Ferrante, "Scheduling Small packets in IPSec Multi-accelerator Based Systems", Journal of Communication(JCM) Academy publisher, vol. 2, no. 2, Stresa, Italy, pp. 53-60, March, 2007.
Fiorin, L., C. Silvano, and M. Sami, "Security Aspects in Networks-on-Chips: Overview and Proposals for Secure Implementations", DSD07, in proceedings of 10th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools (DSD 07), Lübeck, Germany, August 29-31, 2007.
Ferrante, A., A V. Taddeo, M. Sami, F. Mantovani, and J. Fridkins, "Self-adaptive Security at Application Level: a Proposal", ReCoSoC 2007, Jun. 2007, in proceedings of ReCoSoC 2007, June, 2007.
Regazzoni, F., S. Badel, T. Eisenbarth, J. Großschädl, A. Poschmann, Z. Toprak, M. Macchetti, L. Pozzi, C. Paar, Y. Leblebici, et al., "Simulation-based Methodology for Evaluating DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies", International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS IC 07), Samos, Greece, July 16-19, 2007.
Mura, M., M. Paolieri, L. Negri, and M. Sami, "StateCharts to SystemC: a High Level Hardware Simulation Approach", Proceedings of GLSVLSI 2007, Stresa, Italy, March 11-13, 2007.
Regazzoni, F., I. Bonesana, M. Djakov, and A. Mattiuz, "Tairona, an Open Source Platform for Worldwide Meeting and Tutoring", World Conference on Educational Multimedia, Hypermedia and Telecommunications 7 (ED-MEDIA 07), Vancouver, Canada, 2007.
Palermo, G., G. Mariani, C. Silvano, R. Locatelli, and M. Coppola, "A Topology Design Customization Approach for (STNoC)", Nano-Nets 07, in proceedings of 2nd International Conference on Nano-Networks (Nano-Nets 2007)., Catania, Italy, September 24-26, 2007.
Mura, M., "Ultra-low power optimizations for the IEEE 802.15.4 networking protocol", proceedings of MASS, October, 2007.
Bertoni, G M., L. Breveglieri, R. Farina, and F. Regazzoni, "A 640 Mbit/s 32-bit Pipelined Implementation of the AES Algorithm", SECRYPT, Porto, Portugal, July 26, 2008.
Bonesana, I., M. Paolieri, and M D. Santambrogio, "An adaptable FPGA-based System for Regular Expression Matching", Proceedings of Design, Automation and Test in Europe (DATE) Conference, Munich, Germany, March 10-14, 2008.
Luković, S., and L. Fiorin, "An Automated Design Flow for NoC-based MPSoCs on FPGA", RSP 2008, The 19th IEEE/IFIP International Symposium on Rapid System Prototyping, Monterey, USA/CA, June 2-5, 2008.
Regazzoni, F., T. Eisenbarth, L. Breveglieri, P. Ienne, and I. Koren, "Can knowledge regarding the presence of countermeasures against fault attacks simplify power attacks on cryptographic devices?", Proceedings of 23rd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFTS 08), October 1-3, 2008.
Mura, M., and M. Sami, "Code Generation from Statecharts: Simulation of Wireless Sensor Networks", Proceedings of DSD08, Parma, Italy, September, 2008.
Mariani, G., G. Palermo, V. Zaccaria, and C. Silvano, "An Efficient Design Space Exploration Methodology for Multi-Cluster VLIW Architectures based on Artificial Neural Networks", Proc. IFIP International Conference on Very Large Scale Integration VLSI - SoC 2008, Rhodes Island, Greece, October 13-15, 2008.
Luković, S., N. Puzović, and M. Stanisavljević, "An Enhanced Service Provider Communication Interface with Client Priorization", proceedings of IEEE/WFMC International Conference on e-Business, July 26-29, 2008.