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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
TitleA Topology Design Customization Approach for (STNoC)
Publication TypeConference Paper
Year of Publication2007
AuthorsPalermo, G., G. Mariani, C. Silvano, R. Locatelli, and M. Coppola
Conference NameNano-Nets 07, in proceedings of 2nd International Conference on Nano-Networks (Nano-Nets 2007).
Date PublishedSeptember 24-26
Conference LocationCatania, Italy
Keywordsapplication specific design, mapping, network-on-chip (NoC), STNoC, topology customization
Abstract

To support high bandwidth SoCs, a communication design flow is necessary for the design space exploration respecting tight design requirements. In order to exploit the benefits introduced by the NoC approach for the on-chip communication, the paper presents a design flow for the core mapping and customization of the network topology applied to STNoC, the Network on-Chip developed by STMicroelectronics. Starting from ring topology, the proposed application-specific flow tries to find a set of customized topologies, optimized in terms of performance and area/energy overhead, by adding links. The generated STNoC custom topologies provide a reduced cost with respect to the spidergon topology.

DOI10.1109/ASAP.2007.4429959