ALaRI Hang Glider

Search form

Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
Search by content:
Search by:
Export 12 results:
Author [ Title(Asc)] Type Year
Filters: Keyword is multiprocessor system-on-chip (MPSoC)  [Clear All Filters]
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 
S
Fiorin, L., G. Palermo, and C. Silvano, "A Security Monitoring Service for NoCs", Sixth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'08), Atlanta, Georgia, USA., 10/2008.
Fiorin, L., C. Silvano, and M. Sami, "Security Aspects in Networks-on-Chips: Overview and Proposals for Secure Implementations", DSD07, in proceedings of 10th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools (DSD 07), Lübeck, Germany, August 29-31, 2007.
Fiorin, L., G. Palermo, S. Luković, V. Catalano, and C. Silvano, "Secure Memory Accesses on Networks-on-Chip", IEEE Transactions on Computers, vol. 57, no. 9, pp. 1216-1229, September, 2008.
M
Mariani, G., G. Palermo, C. Silvano, and V. Zaccaria, "Multiprocessor System-on-Chip Design Space Exploration based on Multi-level Modeling Techniques", Proceedings of IEEE IC-SAMOS'09 - International Conference on Embedded Computer Systems: Architectures, MOdeling, and Simulation, Samos, Greece, July, 2009.
Mariani, G., G. Palermo, C. Silvano, and V. Zaccaria, "Meta-model Assisted Optimization for Design Space Exploration of Multi-Processor Systems-on-Chip", Euromicro Proceedings of DSD'09 - Conference on Digital System Design, Patras, Greece, August, 2009.
I
Fiorin, L., S. Luković, and G. Palermo, "Implementation of a Reconfigurable Data Protection Module for NoC-based MPSoCs", Proceedings of the 21st IPDPS 2007 Reconfigurable Architecture Workshop (RAW), 21th IEEE International Parallel and Distributed Processing Symposium, Miami, USA/FL, April, 2008.
H
Luković, S., and N. Christianos, "Hierarchical Multi-Agent Protection System for NoC based MPSoCs", Proceedings of the International Workshop on Security and Dependability for Resource Constrained Embedded Systems (SD4RCES 2010), Vienna, Austria, September 14, 2010.
Nacul, A C., F. Regazzoni, and M. Lajolo, "HardwareScheduling Support in SMP Architecture", Design, Automation and Test in Europe(DATE), Nice, France, April 16-20, 2007.
D
Mariani, G., G. Palermo, C. Silvano, and V. Zaccaria, "A Design Space Exploration Methodology Supporting Run-Time Resource Management for Multi-Processors System on-Chip", Proceedings IEEE SASP'09 - Symposium on Application Specific Processors, San Francisco, CA, USA, July, 2009.
Fiorin, L., G. Palermo, S. Luković, and C. Silvano, "A Data protection Unit for NoC-based Architecture", CODES+ISSS 2007, in proceedings of the Fifth IEEE/ACM/FIP International Conference of Hardware/Software Codesign and System Synthesis (CODES+ISSS 2007), Salzburg, Austria, September 30, 2007.
C
Mariani, G., G. Palermo, V. Zaccaria, A. Brankovic, J. Jovic, and C. Silvano, "A Correlation-based Design Space Exploration Methodology for Multi-Processor Systems-on-Chip", Proceedings of DAC 2010: Design Automation Conference, Anheim, CA, USA, pp. 120–125, June, 2010.
A
Luković, S., and L. Fiorin, "An Automated Design Flow for NoC-based MPSoCs on FPGA", RSP 2008, The 19th IEEE/IFIP International Symposium on Rapid System Prototyping, Monterey, USA/CA, June 2-5, 2008.