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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
TitleA Correlation-based Design Space Exploration Methodology for Multi-Processor Systems-on-Chip
Publication TypeConference Paper
Year of Publication2010
AuthorsMariani, G., G. Palermo, V. Zaccaria, A. Brankovic, J. Jovic, and C. Silvano
Conference NameProceedings of DAC 2010: Design Automation Conference
Date PublishedJune
Conference LocationAnheim, CA, USA
Keywordsdesign space exploration, kriging, multiprocessor system-on-chip (MPSoC), response surface
Abstract

Given the increasing complexity of multi-processor systems-on-chip, a wide range of parameters must be tuned to find the best trade-offs in terms of the selected system figures of merit (such as energy, delay and area). This optimization phase is called Design Space Exploration (DSE) consisting of a Multi-Objective Optimization (MOO) problem. In this paper, we propose an iterative design space exploration methodology exploiting the statistical properties of known system configurations to infer, by means of a correlation-based analysis, the next design points to be analyzed with low-level simulations. In fact, the knowledge of few design points is used to predict the expected improvement of unknown configurations. We show that the correlation of the configurations within the multi-processor design space can be modeled successfully with analytical functions and, thus, speed up the overall exploration phase. This makes the proposed methodology a model-assisted heuristic that, for the first time, exploits the correlation about architectural configurations to converge to the solution of the multi-objective problem.