Export 65 results:
Author [ Title
] Type Year Filters: First Letter Of Last Name is C [Clear All Filters]
"Yield Enhancement by Robust Application-specific Mapping on Network-on-Chips",
NoCArc'09: Proceedings of the Second International Workshop on Network on-Chip Architectures, New York City, USA, pp. 37–42, December, 2009.
"Trace-based KPN Composability Analysis for Mapping Simultaneous Applications to MPSoC Platforms",
Proceedings of Design, Automation and Test in Europe(DATE) Conference, Dresden, Germany, March, 2010.
"Trace-based KPN Composability Analysis for Mapping Simultaneous Applications to MPSoC Platforms",
Proceedings of Design, Automation and Test in Europe(DATE) Conference, Dresden, Germany, March, 2010.
"Towards Self-adaptive KPN Applications on NoC-based MPSoCs",
Advances in Software Engineering, vol. 2012, pp. 16 pages, September, 2012.
"Towards an ESL design framework for adaptive and fault-tolerant MPSoCs: MADNESS or not?",
Embedded Systems for Real-Time Multimedia (ESTIMedia), 2011 9th IEEE Symposium on, 2011.
"A Topology Design Customization Approach for (STNoC)",
Nano-Nets 07, in proceedings of 2nd International Conference on Nano-Networks (Nano-Nets 2007)., Catania, Italy, September 24-26, 2007.
"System-Level Optimization of Accelerator Local Memory for Heterogeneous Systems-on-Chip",
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 36, pp. 435-448, 2017.
"A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project.",
Microprocessors and Microsystems - Embedded Hardware Design, vol. 37, issue 6-7, pp. 515–529, 2013.
"A system level model of possible integration of Building Management System in SmartGrid",
Complexity in Engineering (COMPENG 2010), Rome, Italy, February 22-24, 2010.
"System Adaptivity and Fault-tolerance in NoC-based MPSoCs: the MADNESS Project Approach",
Proceedings of the 15th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools (DSD'12), Izmir, Turkey, September 5-8, 2012.
"Smart Building Integration in Smart Grids",
The 44th Heating Ventilation Air Condition and Refrigeration Congress and Exhibition - KGH 2013, 2013.
"Single-Photon Image Sensors",
Special Session, 50th Design Automation Conference (DAC), Austin, Texas, USA, June, 2013.
"Single-Photon Avalanche Diodes (SPADs) for quantum random number generators and beyond",
19th Asia and South Pacific Design Automation Conference (ASP-DAC) 2014, Singapore, IEEE, 01/2014.
"Secure Memory Accesses on Networks-on-Chip",
IEEE Transactions on Computers, vol. 57, no. 9, pp. 1216-1229, September, 2008.
"SCA-Resistance for AES: How Cheap Can We Go?",
Progress in Cryptology – AFRICACRYPT 2018, Cham, Springer International Publishing, 2018.
"SCA-Resistance for AES: How Cheap Can We Go?",
Progress in Cryptology – AFRICACRYPT 2018, Cham, Springer International Publishing, 2018.
"Rethinking Secure FPGAs: TowardsCryptography-friendly Configurable Cell Architecture and its Automated Design Flow",
Proceedings of FCCM, 05/2018.
"Responsiveness of Service Discovery in Wireless Mesh Networks",
20th Pacific Rim International Symposium on Dependable Computing (PRDC), Singapore, IEEE Computer Society, 11/2014.
"Reducing Timing Overhead in Simultaneously Clock-Gated and Power-Gated Designs by Placement-Aware Clustering",
Proceedings of the 19th international workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS 2009), Delft, The Netherlands, September 9-11, 2009.
Reconfigurable Logic Circuit,
, no. GB1719355.8, 11/2017, Submitted.