Research Areas and Goals
ALaRI research activities span over different fields of competence listed below:
- System-level Design, Modeling and Simulation
- Ubiquitous and Pervasive Computing
- Real Time
- Low Power
System-level Design, Modeling and Simulation
Modern electronic systems are very complex, making the task of system designer even more challenging. Complexity can be minimized by increasing the abstraction level at which designers work. This is enabled by tools that help modeling, simulating, analyzing, and synthesizing the whole system in an incremental and modular manner.
The ALaRI institute has been working on system-level design since its foundation. Current research activities involve model-driven development, system-level methodologies for dependability, security, low-power design, hardware/software co-design, validation & verification and component-based design for systems-on-chip, multicore, and many-core.
Multiprocessor Systems-on-Chip (MPSoCs) are composed of a combination of a high number of processing and storage elements interconnected by complex communication architectures. Processing elements include general purpose processors and specialized cores.
ALaRI research in this area focuses on two main topics: Networks-on-Chip (NoCs) and Design Space Exploration (DSE) of complex embedded architectures.
Ubiquitous and Pervasive Computing
Ubiquitous and pervasive computing deal with human-computer interaction in which information processing has been integrated into everyday devices and activities. Examples of ubiquitous and pervasive computing applications are: health care, energy efficiency, environmental monitoring, urban traffic monitoring and management, smart phones, and smart homes.
ALaRI research in this area is focused on wireless sensor networks and, in particular, on power modeling of wireless sensor nodes and on different specific applications such as smart cities, precision agriculture, and energy efficiency, including the use of multicores and many-cores as well.
Dependability is an essential property for embedded systems. With ever-growing reliance of business and general public on computers and communication the reliability of embedded systems that are in phones, networks, vehicles and numerous other systems devices is fundamental to smooth operation of business industry and any other human activity having impact on the entire society.
Our experience with dependability includes modeling, availability evaluation, fault detection, diagnosis, recovery and failure prediction.
Security is a key property for modern embedded systems. ALaRI addresses security at different levels, from the physical to the operating system/middleware ones. At physical level the focus is on the automatic application of protections against physical attacks. At architectural level, the focus is on securing complex systems on chip by means of memory protection mechanism and IP cores authentication, and on optimized implementation of cryptographic algorithms and protocols (e.g., AES and HMAC-SHA2, IPSec). At a middleware and operating systems level the goal is to provide support for security and self-adaptivity.
Embedded systems are more frequently used in critical applications such as cars and airplanes monitoring, nuclear power plants control and automatic drugs delivery. In these situations, acting in a predictable manner with respect to time is necessary to avoid catastrophic consequences.
Our experience in this area concerns real-time operating systems, in particular the hardware accelerators to support the real-time execution of tasks on embedded devices.
Low power is a very strict requirement for battery operated devices and devices which harvest power from the environment. Embedded systems such has mobile devices, sensor nodes and RFIDs fall into this category, it is thus crucial to consider this aspect while designing them.
At ALaRI, the research focuses on different topics, spawning from the realization of the power simulator needed to optimize protocols, over the design of low power architecture for security, to the implementation of low power digital design flow exploiting sub-threshold operations.