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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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C
Cannella, E., O. Derin, and T. Stefanov, "Middleware Approaches for Adaptivity of Kahn Process Networks on Networks-on-Chip", DASIP'11: Proceedings of the Conference on Design and Architectures for Signal and Image Processing, Tampere, Finland, pp. 1–8, November 2-4, 2011.
Cannella, E., L. Di Gregorio, L. Fiorin, M. Lindwer, P. Meloni, O. Neugebauer, and A. Pimentel, "Towards an ESL design framework for adaptive and fault-tolerant MPSoCs: MADNESS or not?", Embedded Systems for Real-Time Multimedia (ESTIMedia), 2011 9th IEEE Symposium on, 2011.
Cannella, E., O. Derin, P. Meloni, G. Tuveri, and T. Stefanov, "Adaptivity Support for MPSoCs based on Process Migration in Polyhedral Process Networks", VLSI Design, vol. 2012, no. Article ID 987209: Hindawi, pp. 15 pages, February, 2012.
Cappiello, C., A. Hinostroza, B. Pernici, M. Sami, E. Henis, R. I. Kat, K. Z. Meth, and M. Mura, "ADSC: Application-Driven Storage Control for Energy Efficiency", Information and Communication on Technology for the Fight against Global Warming - First International Conference ICT-GLOW, vol. 6868, Toulouse, France, Springer, pp. 165-179, 08/2011.
Cassoli, F., F. Polloni, S. Marchesin, M. Macchetti, G M. Bertoni, L. Breveglieri, and P. Fragneto, "Efficient C implementation of the ECC and AES cryptographic systems", Technology Leadership Day - organized by the MicroSwiss Network, Fribourg, October 10, 2001.
Castrillón, J., R. Velásquez, A. Stulova, W. Sheng, J. Ceng, R. Leupers, G. Ascheid, and H. Meyr, "Trace-based KPN Composability Analysis for Mapping Simultaneous Applications to MPSoC Platforms", Proceedings of Design, Automation and Test in Europe(DATE) Conference, Dresden, Germany, March, 2010.
Cevrero, A., F. Regazzoni, M. Schwander, S. Badel, P. Ienne, and Y. Leblebici, "Power-Gated MOS Current Mode Logic (PG-MCML): A Power-Aware DPA-Resistant Standard Cell Library", 48th Design Automation Conference (DAC), San Diego, Califorina, June, 2011.
Chandra, S., F. Regazzoni, and M. Lajolo, "Hardware/software partitioning of operating systems: a behavioral synthesis approach", GLSVLSI '06: Proceedings of the 16th ACM Great Lakes symposium on VLSI, Philadelphia, PA, USA, ACM Press, New York, USA, pp. 324–329, 2006.
Charbon, E., and F. Regazzoni, "Single-Photon Image Sensors", Special Session, 50th Design Automation Conference (DAC), Austin, Texas, USA, June, 2013.
Chaves, R., Ł. Chmielewski, F. Regazzoni, and L. Batina, "SCA-Resistance for AES: How Cheap Can We Go?", Progress in Cryptology – AFRICACRYPT 2018, Cham, Springer International Publishing, 2018.
Choudhury, A D., G. Palermo, C. Silvano, and V. Zaccaria, "Yield Enhancement by Robust Application-specific Mapping on Network-on-Chips", NoCArc'09: Proceedings of the Second International Workshop on Network on-Chip Architectures, New York City, USA, pp. 37–42, December, 2009.
Ciobanu, C. B., G. Gaydadjiev, C. Pilato, and D. Sciuto, "The Case for Polymorphic Registers in Dataflow Computing", International Journal of Parallel Programming, vol. 54, issue 5, pp. 54-62, 10/2018.
Č
Čongradac, V., F. Kulić, and S. Luković, "Prediction of the type of heating with EnergyPlus program and fuzzy logic", 40th International Congress on Heating, Refrigerating and Air-conditioning (KGH Congress), Belgrade, Serbia, 12/2009.
D
Dadda, L., M. Macchetti, and J. Owen, "The Design of a High Speed ASIC Unit for the Hash Function SHA-256 (384,512)", DATE '04: Proceedings of the conference on Design, automation and test in Europe, Washington, DC, USA, IEEE Computer Society, pp. 30070, 2004.
Dadda, L., M. Macchetti, and J. Owen, "An ASIC design for a high speed implementation of the hash function SHA-256 (384, 512)", GLSVLSI '04: Proceedings of the 14th ACM Great Lakes symposium on VLSI, Boston, MA, USA, ACM Press, New York, USA, pp. 421–425, 2004.
Dadda, L., A. Ferrante, and M. Macchetti, "A Memory Unit for Priority Management in IPSec Accelerators", proceedings of ICC07. Glasgow, Scotland: IEEE Communications Society, Glasgow, Scotland, June 24, 2007.
Dal Pozzolo, A., G. Boracchi, O. Caelen, C. Alippi, and G. Bontempi, "Credit Card Fraud Detection: A Realistic Modeling and a Novel Learning Strategy", IEEE Transactions on Neural Networks and Learning Systems, pp. 1-14, 2018.
Derin, O., and A. Ferrante, "Simulation of a Self-adaptive Run-time Environment with Hardware and Software Components", SINTER '09: Proceedings of the 2009 ESEC/FSE workshop on Software integration and evolution @ runtime, Amsterdam, The Netherlands, ACM, pp. 37–40, August, 2009.
Derin, O., E. Diken, and L. Fiorin, "A Middleware Approach to Achieving Fault-tolerance of Kahn Process Networks on Networks-on-Chips", International Journal of Reconfigurable Computing, vol. 2011, no. Article ID 295385: Hindawi, pp. 14 pages, February, 2011.
Derin, O., P. Kuncheerat Ramankutty, P. Meloni, and G. Tuveri, "A Low Overhead Self-adaptation Technique for KPN Applications on NoC-based MPSoCs", Proceedings of the 3rd International Conference on Pervasive and Embedded Computing and Communication Systems (PECCS) - Special Session on Self-Adaptive Networked Embedded Systems (SANES), Barcelona, Spain, February 19-21, 2013.

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