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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
TitleSCA-Resistance for AES: How Cheap Can We Go?
Publication TypeConference Paper
Year of Publication2018
AuthorsChaves, R., Ł. Chmielewski, F. Regazzoni, and L. Batina
EditorJoux, A., A. Nitaj, and T. Rachidi
Conference NameProgress in Cryptology – AFRICACRYPT 2018
PublisherSpringer International Publishing
Conference LocationCham
ISBN Number978-3-319-89339-6
Abstract

This paper introduces a novel AES structure capable of improving the robustness against power analysis attacks while allowing for a very compact structure with a potentially negligible area and performance impact. The proposed design is based on a low entropy masking scheme, where half of the time the true value and half of the time the complemented value are used to mask the power consumption variation. The obtained experimental results suggest that the area overhead for the protection against power analysis is as low as 5{%} LUT increase with a performance degradation of about 10{%}. When compared with the state of the art supported on FPGAs, efficiency improvements above 6 times and a throughput improvement of at least two times higher are achieved.