]
"Special Session Paper: Efficient Arithmetic for lattice-based Cryptography",
Proceedings of the CODES+ISSS 2017, 2017.
"Speeding Security on the Intel StrongARM",
Embedded Intel Solutions, pp. 31-33, 2005.
"Speeding Up AES By Extending a 32 bit Processor Instruction Set",
ASAP '06: Proceedings of the IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06), Washington, DC, USA, IEEE Computer Society, pp. 275-282, 2006.
"Spotting the Malicious Moment: Characterizing Malware Behavior Using Dynamic Features",
2016 11th International Conference on Availability, Reliability and Security (ARES), Salzburg, Austria, 08/2016.
"Stack Protection Unit as a step towards securing MPSoCs",
Proceedings of 24th IEEE International Parallel and Distributed Processing Symposium (IPDPS), Atlanta, USA, April 19-23, 2010.
"Standard lattices in hardware",
Proceedings of the 53rd Annual Design Automation Conference DAC 2016, Austin, TX, USA, ACM, pp. 162, 06/2016.
"StateCharts to SystemC: a High Level Hardware Simulation Approach",
Proceedings of GLSVLSI 2007, Stresa, Italy, March 11-13, 2007.
"Stealthy Dopant-Level Hardware Trojans",
Workshop on Cryptographic Hardware and Embedded Systems (CHES), Santa Barbara, California, USA, August, 2013.
"Stealthy Dopant-Level Hardware Trojans: Extended Version",
Journal of Cryptographic Engineering, vol. 4, issue 1, pp. 19-31, 04/2014.
"STRATOS: open System for TRAcTOrs’ autonomous OperationS",
EFITA Internation Conference on Sustainable Agriculture through ICT Innovation , Torino, Italy, European Federation for Information Technology in Agriculture, Food and the Environment, 06/2013.
"STRATOS: Open System For Tractors' Autonomous Operations",
5th International Conference on Automation Technology for Off-road Equipment (ATOE), Valencia, Spain, International Commission of Agricultural and Biosystems Engineering (CIGR), pp. 162-187, 07/2012.
"A survey on hardware trojan detection techniques",
IEEE International Symposium on Circuits and Systems (ISCAS) 2015, 2015, Lisbon, Portugal, IEEE, pp. 2021-2024, 08/2015.
"System Adaptivity and Fault-tolerance in NoC-based MPSoCs: the MADNESS Project Approach",
Proceedings of the 15th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools (DSD'12), Izmir, Turkey, September 5-8, 2012.
"System Level Approach to Denial-of-Service Detection in MPSoCs",
Proceedings of the 7th Workshop on Embedded Systems Security (WESS'2012), A Workshop of the Embedded Systems Week (ESWEEK'12), 10/2012.
"A system level model of possible integration of Building Management System in SmartGrid",
Complexity in Engineering (COMPENG 2010), Rome, Italy, February 22-24, 2010.
"System Policies for Gradual Tuning of Security and Workload in Wireless Sensor Networks",
Proceedings of the IEEE Wireless Telecommunication Symposium (WTS), New York, USA, April, 2011.
"A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project.",
Microprocessors and Microsystems - Embedded Hardware Design, vol. 37, issue 6-7, pp. 515–529, 2013.
"System-level design of embedded applications by UML: the Wireless Meter Reading case",
MSy2002 Workshop, Winterthur, pp. 181-187, October 3-4, 2002.
"System-Level Optimization of Accelerator Local Memory for Heterogeneous Systems-on-Chip",
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 36, pp. 435-448, 2017.
"Systems Engineering for Assessment of Virtual Power System Implementations",
Artificial Intelligence Applications and Innovations, vol. 412: Springer Berlin Heidelberg, pp. 667-676, 2013.