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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
TitleStack Protection Unit as a step towards securing MPSoCs
Publication TypeConference Paper
Year of Publication2010
AuthorsLuković, S., P. Pezzino, and L. Fiorin
Conference NameProceedings of 24th IEEE International Parallel and Distributed Processing Symposium (IPDPS)
Date PublishedApril 19-23
Conference LocationAtlanta, USA
KeywordsFPGA, microblaze, security, stack protection unit
Abstract

Reconfigurable technologies are getting popular as an instrument for not only verification and prototyping but also commercial implementation of Multi-Processor Systems-on-Chip (MPSoC) architectures. At the same time, these systems in particular Networks-on-Chip (NoCs) based ones, have emerged as a design strategy to cope with increased requirements and complexity of modern applications. Nevertheless, increasing heterogeneity coupled with possibility of reconfiguration makes security become one of major concerns in MPSoC design. Protection strategies must consider attack scenarios at both levels - individual cores and system level security. This work represents an element in a wider security framework, it shows a solution against one of the most widespread types of attacks - code injection. Our response to tackle this challenge is given in form of Stack Protection Unit (SPU) embedded into processing core. MicroBlaze soft-core processor serves as a case study for verification of the proposed solution in FPGA technology.

DOI10.1109/IPDPSW.2010.5470728