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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
TitleSystem-Level Optimization of Accelerator Local Memory for Heterogeneous Systems-on-Chip
Publication TypeJournal Article
Year of Publication2017
AuthorsPilato, C., P. Mantovani, G. Di Guglielmo, and L. P. Carloni
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume36
Pagination435-448
Keywordsalgorithm design and analysis, Data structures, hardware, hardware accelerator, High-Level Synthesis, IP networks, Memory Design, Memory management, Multi-bank Architecture, Random access memory
DOI10.1109/TCAD.2016.2611506