Export 46 results:
Author [ Title] Type Year Filters: Author is Cristina Silvano [Clear All Filters]
"MPSoCs Run-Time Monitoring through Networks-on-Chip",
The 2009 Conference on Design, Automation and Test In Europe (DATE'09), Nice, France, April/2009.
"A Monitoring System for NoCs",
Proceedings of the Third International Workshop on Network on Chip Architectures (NoCArc'2010), Atlanta, Georgia, USA, December, 2010.
"A Methodology for efficient architectural exploration of energy-delay trade-offs for embedded systems",
SAC 2003, Melbourne, pp. 672-678, March, 2003.
"Meta-model Assisted Optimization for Design Space Exploration of Multi-Processor Systems-on-Chip",
Euromicro Proceedings of DSD'09 - Conference on Digital System Design, Patras, Greece, August, 2009.
"Mapping and Topology Customization Approaches for Application-Specific STNoC Designs",
IEEE Proceedings of ASAP'07 - 18th International Conference on Application-specific Systems, Architectures and Processors, Montréal, Québec, Canada, July, 2007.
"Linking run-time resource management of embedded multi-core platforms with automated design-time exploration",
IET Computers and Digital Techniques, vol. 5, no. -, pp. 123–135, 2011.
"Linking run-time management with design space exploration at multiple abstraction levels",
Proceedings of the DATE'10 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, Dresden, Germany, March, 2010.
"An Instruction-Level Methodology for Power Estimation and Optimization of Embedded VLIW cores",
DATE 2002, Paris, pp. 1128, March 4-8, 2002.
"An industrial design space exploration framework for supporting run-time resource management on multi-core systems",
Proceedings of Design, Automation and Test in Europe (DATE) Conference, Dresden, Germany, March, 2010.
"Evaluating Run-time Resource Management Policies for Multi-core Embedded Platforms with the EMME Evaluation Framework",
Workshop on Parallel Programming and Run-time Management Techniques for Many-core Architectures, February, 2012.
"Energy Estimation and Optimization of Embedded VLIW Processors based on Instruction Clustering",
39th Design Automation Conference, New Orleans, pp. 886-891, June 10-14, 2002.
"An Efficient Design Space Exploration Methodology for Multi-Cluster VLIW Architectures based on Artificial Neural Networks",
Proc. IFIP International Conference on Very Large Scale Integration VLSI - SoC 2008, Rhodes Island, Greece, October 13-15, 2008.
"DRuiD: Designing Reconfigurable Architectures with Decision-making Support",
19th Asia and South Pacific Design Automation Conference (ASP-DAC), Singapore, 01/2014.
"Design-space Exploration and Runtime Resource Management for Multicores",
ACM Transactions on Embedded Computing Systems (TECS) - Special issue on application-specific processors, vol. 13, issue 2, pp. 20:1–20:27, 09/2013.
"Design Space Exploration Supporting Run-time Resource Management",
Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, New York, USA, Springer, 2011.
"Design Space Exploration of Parallel Architectures",
Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, New York, USA, Springer, 2011.
"Design Space Exploration of a Reconfigurable System for Supporting Video Streaming Run-time Management",
Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, New York, USA, Springer, 2011.
"A Design Space Exploration Methodology Supporting Run-Time Resource Management for Multi-Processors System on-Chip",
Proceedings IEEE SASP'09 - Symposium on Application Specific Processors, San Francisco, CA, USA, July, 2009.
"Design Space Exploration for Run-Time Management of a Reconfigurable System for Video Streaming",
Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, 1: Springer, pp. 189-204, 2011.
"Design Space Exploration for Run-Time Management of a Reconfigurable System for Video Streaming",
Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, 1: Springer, pp. 189-204, 2011.