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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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2013
Mariani, G., G. Palermo, V. Zaccaria, and C. Silvano, "ARTE: an Application-specific Run-Time Management Framework for Multi-cores based on Queuing Models", Parallel Computing, 2013.
Bayrak, A. Galip, F. Regazzoni, D. Novo Bruna, P. Brisk, F-X. Standaert, and P. Ienne, "Automatic Application of Power Analysis Countermeasures", IEEE Transactions on Computers, vol. PP, issue 99, 12/2013.
Fiorin, L., G. Palermo, and C. Silvano, "A Configurable Monitoring Infrastructure for NoC-Based Architectures", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. PP, issue 99, 2013.
Mariani, G., G. Palermo, V. Zaccaria, and C. Silvano, "Design-space Exploration and Runtime Resource Management for Multicores", ACM Transactions on Embedded Computing Systems (TECS) - Special issue on application-specific processors, vol. 13, issue 2, pp. 20:1–20:27, 09/2013.
Burri, S., D. Stucki, Y. Maruyama, C. Bruschini, E. Charbon, and F. Regazzoni, "Jailbreak Imagers: Transforming a Single-Photon Image Sensor into a True Random Number Generator", International Image Sensor Workshop (IISW), Snowbird Resort, Utah, USA, June, 2013.
Mariani, G., V-M. Sima, G. Palermo, V. Zaccaria, G. Marchiori, C. Silvano, and K. Bertels, "Run-time Optimization of a Dynamically Reconfigurable Embedded System Through Performance Prediction", 23rd International Conference on Field Programmable Logic and Applications (FPL), Porto, Portugal, IEEE, 09/2013.
Mariani, G., V-M. Sima, G. Palermo, V. Zaccaria, G. Marchiori, C. Silvano, and K. Bertels, "Run-time Optimization of a Dynamically Reconfigurable Embedded System Through Performance Prediction", 23rd International Conference on Field Programmable Logic and Applications (FPL), Porto, Portugal, IEEE, 09/2013.
Derin, O., E. Cannella, G. Tuveri, P. Meloni, T. Stefanov, L. Fiorin, L. Raffo, and M. Sami, "A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project.", Microprocessors and Microsystems - Embedded Hardware Design, vol. 37, issue 6-7, pp. 515–529, 2013.
Derin, O., E. Cannella, G. Tuveri, P. Meloni, T. Stefanov, L. Fiorin, L. Raffo, and M. Sami, "A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project.", Microprocessors and Microsystems - Embedded Hardware Design, vol. 37, issue 6-7, pp. 515–529, 2013.
2014
Barenghi, A., C. Hocquet, D. Bol, F-X. Standaert, F. Regazzoni, and I. Koren, "A Combined Design-Time/Test-Time Study of the Vulnerability of Sub-Threshold Devices to Low Voltage Fault Attacks", IEEE Transactions on Emerging Topics in Computing, vol. PP, issue 99, 04/2014.
Mariani, G., R. Meeuws, G. Palermo, V-M. Sima, C. Silvano, and K. Bertels, "DRuiD: Designing Reconfigurable Architectures with Decision-making Support", 19th Asia and South Pacific Design Automation Conference (ASP-DAC), Singapore, 01/2014.
Mariani, G., R. Meeuws, G. Palermo, V-M. Sima, C. Silvano, and K. Bertels, "DRuiD: Designing Reconfigurable Architectures with Decision-making Support", 19th Asia and South Pacific Design Automation Conference (ASP-DAC), Singapore, 01/2014.
Sami, M., M. Malek, U. Bondi, and F. Regazzoni, "Embedded Systems Education: Job Market Expectations", Workshop on Embedded and Cyber-Physical Systems Education (WESE) , New Delhi, India, ACM, 10/2014.
Fiorin, L., and M. Sami, "Fault-Tolerant Network Interfaces for Networks-on-Chip", IEEE Trans. Dependable Secur. Comput., vol. 11, issue 1, pp. 16–29, 01/2014.
Durvaux, F., S. Kerckhof, F. Regazzoni, and F-X. Standaert, "Security IPs and IP Security with FPGAs", Secure Smart Embedded Devices Platform and Applications, 2014.
Regazzoni, F., S. Burri, D. Stucki, Y. Maruyama, C. Bruschini, and E. Charbon, "Single-Photon Avalanche Diodes (SPADs) for quantum random number generators and beyond", 19th Asia and South Pacific Design Automation Conference (ASP-DAC) 2014, Singapore, IEEE, 01/2014.
Güneys, T., F. Regazzoni, P. Sasdrich, and M. Wojcik, "(THOR) - The hardware onion router", 24th International Conference on Field Programmable Logic and Applications, (FPL) 2014, Munich, Germany, IEEE, 09/2014.
2015
Bayrak, A. Galip, F. Regazzoni, D. Novo, P. Brisk, F-X. Standaert, and P. Ienne, "Automatic Application of Power Analysis Countermeasures", IEEE Transactions on Computers , vol. 64, issue 2, pp. 329-341, 02/2015.

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