Export 144 results:
Author Title [ Type
] Year Filters: First Letter Of Last Name is R [Clear All Filters]
"Standard lattices in hardware",
Proceedings of the 53rd Annual Design Automation Conference DAC 2016, Austin, TX, USA, ACM, pp. 162, 06/2016.
"Speeding Up AES By Extending a 32 bit Processor Instruction Set",
ASAP '06: Proceedings of the IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06), Washington, DC, USA, IEEE Computer Society, pp. 275-282, 2006.
"Speeding Security on the Intel StrongARM",
Embedded Intel Solutions, pp. 31-33, 2005.
"Special Session Paper: Efficient Arithmetic for lattice-based Cryptography",
Proceedings of the CODES+ISSS 2017, 2017.
"Small-scale Variants of the Secure Hash Standard",
ECRYPT workshop on RFID and lightweight cryptography, Graz, Austria, July 14-15, 2005.
"Sleuth: Automated Verification of Software Power Analysis Countermeasures",
Workshop on Cryptographic Hardware and Embedded Systems (CHES), Santa Barbara, California, USA, August, 2013.
"Single-Photon Image Sensors",
Special Session, 50th Design Automation Conference (DAC), Austin, Texas, USA, June, 2013.
"Single-Photon Avalanche Diodes (SPADs) for quantum random number generators and beyond",
19th Asia and South Pacific Design Automation Conference (ASP-DAC) 2014, Singapore, IEEE, 01/2014.
"Simulation-Time Security Margin Assessment against power-based Side Channel Attacks",
7th Workshop on Embedded Systems Security (WESS), Tampere, Finland, October, 2012.
"Simulation-based Methodology for Evaluating DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies",
International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS IC 07), Samos, Greece, July 16-19, 2007.
"Simulation and Analysis of Negative-Bias Temperature Instability Aging on Power Analysis Attacks",
IEEE Int. Symposium on Hardware-Oriented Security and Trust, McLean, VA, USA, 05/2015.
"Security: The Dark Side of Approximate Computing?",
Proceedings of the International Conference on Computer-Aided Design, New York, NY, USA, ACM, 11/2018.
"Security Enhanced Linux on Embedded Systems: a Hardware-accelerated Implementation",
17th Asia and South Pacific Design Automation Conference, ASP-DAC 2012, Sydney, Australia, 02/2012.
"Security Challenges for Hardware Designers of Mobile Systems",
2015 Mobile Systems Technologies Workshop (MST), May, 2015.
"Secure architectures of future emerging cryptography",
International Conference on Computing Frontiers CF'16, Como, italy, ACM New York, pp. 315-322, 05/2016.
"SCA-Resistance for AES: How Cheap Can We Go?",
Progress in Cryptology – AFRICACRYPT 2018, Cham, Springer International Publishing, 2018.
"SCA-Resistance for AES: How Cheap Can We Go?",
Progress in Cryptology – AFRICACRYPT 2018, Cham, Springer International Publishing, 2018.
"Round gating for low energy block ciphers",
2016 IEEE International Symposium on Hardware Oriented Security and Trust, HOST, McLean, VA, USA, IEEE Computer Society, pp. 55-60, 05/2016.
"Risk Assessment of Atrial Fibrillation: a Failure Prediction Approach",
41st Computing in Cardiology Conference (CinC), Cambridge, MA, USA, IEEE Computer Society, 09/2014.
"Rethinking Secure FPGAs: TowardsCryptography-friendly Configurable Cell Architecture and its Automated Design Flow",
Proceedings of FCCM, 05/2018.