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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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Fiorin, L., G. Palermo, C. Silvano, and H. Elmiligi, "Security in NoC", Networks-on-Chips: Theory and Practice: Taylor and Francis Group, LLC - CRC Press, pp. 157-194, 2009.
Fiorin, L., C. Silvano, and M. Sami, "Security Aspects in Networks-on-Chips: Overview and Proposals for Secure Implementations", DSD07, in proceedings of 10th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools (DSD 07), Lübeck, Germany, August 29-31, 2007.
Fiorin, L., C. Silvano, and M. Sami, "Security Aspects in Networks-on-Chips: Overview and Proposals for Secure Implementations", DSD07, in proceedings of 10th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools (DSD 07), Lübeck, Germany, August 29-31, 2007.
Fiorin, L., G. Palermo, S. Luković, V. Catalano, and C. Silvano, "Secure Memory Accesses on Networks-on-Chip", IEEE Transactions on Computers, vol. 57, no. 9, pp. 1216-1229, September, 2008.
O'Neill, M., E. O'Sullivan, G. McWilliams, M-J. Saarinen, C. Moore, A. Khalid, J. Howe, R. Del Pino, M. Abdalla, F. Regazzoni, et al., "Secure architectures of future emerging cryptography", International Conference on Computing Frontiers CF'16, Como, italy, ACM New York, pp. 315-322, 05/2016.
R
Mariani, G., V-M. Sima, G. Palermo, V. Zaccaria, G. Marchiori, C. Silvano, and K. Bertels, "Run-time Optimization of a Dynamically Reconfigurable Embedded System Through Performance Prediction", 23rd International Conference on Field Programmable Logic and Applications (FPL), Porto, Portugal, IEEE, 09/2013.
Mariani, G., V-M. Sima, G. Palermo, V. Zaccaria, G. Marchiori, C. Silvano, and K. Bertels, "Run-time Optimization of a Dynamically Reconfigurable Embedded System Through Performance Prediction", 23rd International Conference on Field Programmable Logic and Applications (FPL), Porto, Portugal, IEEE, 09/2013.
Palermo, G., C. Silvano, V. Zaccaria, E. Rigoni, C. Kavka, A. Turco, and G. Mariani, "Response Surface Modeling for Embedded System Design Space Exploration", Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, New York, USA, Springer, 2011.
Salvioni, C., and A V. Taddeo, "Remote Cooperation on Project-centred Learning: a Working Implemented Solution in Academia", COOPER Workshop in conjunction with EC-TEL07 Conference, September 17, 2007.
Paolieri, M., I. Bonesana, and M D. Santambrogio, "ReCPU: a Parallel and Pipelined Architecture for Regular Expression Matching", Proceedings of 15th Annual IFIP International Conference on Very Large Scale Integration {(IFIP-VLSI 07)},(best paper award), Atlanta, Georgia, USA, October 15-17, 2007.
Tumeo, A., F. Regazzoni, G. Palermo, F. Ferrandi, and D. Sciuto, "A Reconfigurable Multiprocessor Architecture for a Reliable Face Recognition Implementation", Proceedings of Design, Automation and Test in Europe (DATE) Conference, Dresden, Germany, March, 2010.
O
Mariani, G., G. Palermo, C. Silvano, and V. Zaccaria, "OSCAR: an Optimization Methodology Exploiting Spatial Correlation in Multi-core Design Space", IEEE Transactions on Computer-Aided Design, vol. 21, issue 5, no. -: IEEE, pp. 740-753, 05/2012.
Rigoni, E., C. Kavka, A. Turco, G. Palermo, C. Silvano, V. Zaccaria, and G. Mariani, "Optimization Algorithms for Embedded System Design Space Exploration", Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, New York, USA, Springer, 2011.
M
Mariani, G., G. Palermo, C. Silvano, and V. Zaccaria, "Multiprocessor System-on-Chip Design Space Exploration based on Multi-level Modeling Techniques", Proceedings of IEEE IC-SAMOS'09 - International Conference on Embedded Computer Systems: Architectures, MOdeling, and Simulation, Samos, Greece, July, 2009.

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