Export 131 results:
Author Title Type [ Year
] Filters: First Letter Of Last Name is S [Clear All Filters]
"Development cost and size estimation starting from high-level specifications",
CODES '01: Proceedings of the ninth international symposium on Hardware/software codesign, Copenhagen, Denmark, ACM Press, New York, USA, pp. 86-91, 2001.
"The 'Smart Card System' project: From plastic money to mobile transaction support",
Technology Leadership Day - organized by the MicroSwiss Network, Fribourg, October 10, 2001.
"An Application Level Synthesis Methodology for Embedded Systems",
ISCAS 2002, Scottsdale, pp. 473-476, May 26-29, 2002.
"Energy Estimation and Optimization of Embedded VLIW Processors based on Instruction Clustering",
39th Design Automation Conference, New Orleans, pp. 886-891, June 10-14, 2002.
"Energy Estimation and Optimization of Embedded VLIW Processors based on Instruction Clustering",
39th Design Automation Conference, New Orleans, pp. 886-891, June 10-14, 2002.
"Energy Estimation and Optimization of Embedded VLIW Processors based on Instruction Clustering",
39th Design Automation Conference, New Orleans, pp. 886-891, June 10-14, 2002.
"An Instruction-Level Methodology for Power Estimation and Optimization of Embedded VLIW cores",
DATE 2002, Paris, pp. 1128, March 4-8, 2002.
"An Instruction-Level Methodology for Power Estimation and Optimization of Embedded VLIW cores",
DATE 2002, Paris, pp. 1128, March 4-8, 2002.
"An Instruction-Level Methodology for Power Estimation and Optimization of Embedded VLIW cores",
DATE 2002, Paris, pp. 1128, March 4-8, 2002.
"An Application Level Synthesis Methodology for Multidimensional Embedded Processing Systems",
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 22, no. 11, pp. 1457-1470, November, 2003.
"A Methodology for efficient architectural exploration of energy-delay trade-offs for embedded systems",
SAC 2003, Melbourne, pp. 672-678, March, 2003.
"A Methodology for efficient architectural exploration of energy-delay trade-offs for embedded systems",
SAC 2003, Melbourne, pp. 672-678, March, 2003.
"A Methodology for efficient architectural exploration of energy-delay trade-offs for embedded systems",
SAC 2003, Melbourne, pp. 672-678, March, 2003.
"A Methodology for efficient architectural exploration of energy-delay trade-offs for embedded systems",
SAC 2003, Melbourne, pp. 672-678, March, 2003.
"FSM–based power modeling of wireless protocols: the case of bluetooth",
ISLPED '04: Proceedings of the 2004 international symposium on Low power electronics and design, Newport Beach, California, USA, ACM Press, New York, USA, pp. 369-374, 2004.
"UML System-Level Analysis and Design of Secure Communication Schemes for Embedded Systems",
FDL'04, Lille, France, pp. 301-312, September 14-17, 2004.
"Application-Driven Optimization of VLIW Architectures: A Hardware-Software Approach",
RTAS '05: Proceedings of the 11th IEEE Real Time on Embedded Technology and Applications Symposium, Washington, DC, USA, IEEE Computer Society, pp. 128–137, 03/2005.
"Flexible Power Modeling for Wireless Systems: Power Modeling and Optimization of two Bluetooth Implementations",
WOWMOM '05: Proceedings of the Sixth IEEE International Symposium on a World of Wireless Mobile and Multimedia Networks (WoWMoM'05), Washington, DC, USA, IEEE Computer Society, pp. 408–416, 2005.
"From a young academic institute a broad minded approach: the working and learning environment of the ALaRI Intranet tool (case study)",
MICROLEARNING 2005: Learning & Working in New Media Environments, Innsbruck, Austria, June 23-24, 2005.
"Speeding Security on the Intel StrongARM",
Embedded Intel Solutions, pp. 31-33, 2005.