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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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Author Title Type [ Year(Desc)]
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2001
Cassoli, F., F. Polloni, S. Marchesin, M. Macchetti, G M. Bertoni, L. Breveglieri, and P. Fragneto, "Efficient C implementation of the ECC and AES cryptographic systems", Technology Leadership Day - organized by the MicroSwiss Network, Fribourg, October 10, 2001.
2006
Macchetti, M., and W. Chen, "ASIC Hardware Implementation of the IDEA NXT Encryption Algorithm", IEEE International Symposium on Circuits and Systems, Kos, Greece, May 21-24, 2006.
Bongio, A., J. van Bruggen, S. Ceri, V. Cristea, P. Dolog, A. Hoffmann, M. Matera, M. Mura, A V. Taddeo, X. Zhou, et al., "COOPER: Towards A Collaborative Open Environment of Project-centred Learning", proceedings to EC-TEL'06 conference, Crete, Greece, October 1-4, 2006.
Bongio, A., J. van Bruggen, S. Ceri, V. Cristea, P. Dolog, A. Hoffmann, M. Matera, M. Mura, A V. Taddeo, X. Zhou, et al., "COOPER: Towards A Collaborative Open Environment of Project-centred Learning", proceedings to EC-TEL'06 conference, Crete, Greece, October 1-4, 2006.
Chandra, S., F. Regazzoni, and M. Lajolo, "Hardware/software partitioning of operating systems: a behavioral synthesis approach", GLSVLSI '06: Proceedings of the 16th ACM Great Lakes symposium on VLSI, Philadelphia, PA, USA, ACM Press, New York, USA, pp. 324–329, 2006.
2007
Palermo, G., G. Mariani, C. Silvano, R. Locatelli, and M. Coppola, "Application-Specific Topology Design Customization for STNoC", DSD07, in proceedings of 10th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools (DSD 07), Lübeck, Germany, August 29-31, 2007.
Derin, O., "Learning Java by a Card Game: A Case Study", LG2007: Proceedings of Learning with Games Conference, Sophia Antipolis, France, pp. 221–228, September 24-27, 2007.
Palermo, G., G. Mariani, C. Silvano, R. Locatelli, and M. Coppola, "Mapping and Topology Customization Approaches for Application-Specific STNoC Designs", IEEE Proceedings of ASAP'07 - 18th International Conference on Application-specific Systems, Architectures and Processors, Montréal, Québec, Canada, July, 2007.
Ferrante, A., S. Chandra, and V. Piuri, "A Query Unit for the IPSec Databases", SECRYPT 2007, Barcelona, Spain, 07/2007.
Palermo, G., G. Mariani, C. Silvano, R. Locatelli, and M. Coppola, "A Topology Design Customization Approach for (STNoC)", Nano-Nets 07, in proceedings of 2nd International Conference on Nano-Networks (Nano-Nets 2007)., Catania, Italy, September 24-26, 2007.
2008
Fiorin, L., G. Palermo, S. Luković, V. Catalano, and C. Silvano, "Secure Memory Accesses on Networks-on-Chip", IEEE Transactions on Computers, vol. 57, no. 9, pp. 1216-1229, September, 2008.
2009
Bailey, D. V., L. Batina, D. J. Bernstein, P. Birkner, J. W. Bos, H. - Chung Chen, C. - Mou Cheng, G. van Damme, T. Güneysu, F. Gurkaynak, et al., "Breaking ECC2K-130", IACR Cryptology ePrint Archive, vol. 2009, pp. 541, 11/2009.
Bailey, D. V., L. Batina, D. J. Bernstein, P. Birkner, J. W. Bos, H. - Chung Chen, C. - Mou Cheng, G. van Damme, T. Güneysu, F. Gurkaynak, et al., "Breaking ECC2K-130", IACR Cryptology ePrint Archive, vol. 2009, pp. 541, 11/2009.
Regazzoni, F., A. Cevrero, F-X. Standaert, S. Badel, T. Kluter, P. Brisk, Y. Leblebici, and P. Ienne, "A Design Flow and Evaluation Framework for DPA-resistant Instruction Set Extensions", Cryptographic Hardware and Embedded Systems (CHES), vol. 5747, Lausanne, Switzerland, Springer Berlin Heidelberg, pp. 205-219, September, 2009.
Ferrante, A., S. Chandra, and V. Piuri, "IPSec Database Query Acceleration", E-business and Telecommunications, vol. 23: Springer Berlin Heidelberg, pp. 188-200, 2009.
Čongradac, V., F. Kulić, and S. Luković, "Prediction of the type of heating with EnergyPlus program and fuzzy logic", 40th International Congress on Heating, Refrigerating and Air-conditioning (KGH Congress), Belgrade, Serbia, 12/2009.
Fiorin, L., G. Palermo, C. Silvano, V. Catalano, R. Locatelli, and M. Coppola, Programmable data protection device, secure programming manager system and process for controlling access to an interconnect network for an integrated circuit, , no. EP 20070301411, 04/2009.
Fiorin, L., G. Palermo, C. Silvano, V. Catalano, R. Locatelli, and M. Coppola, Programmable data protection device, secure programming manager system and process for controlling access to an interconnect network for an integrated circuit, , no. EP 20070301411, 04/2009.
Upasani, G., A. Calimera, A. Macii, E. Macii, and M. Poncino, "Reducing Timing Overhead in Simultaneously Clock-Gated and Power-Gated Designs by Placement-Aware Clustering", Proceedings of the 19th international workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS 2009), Delft, The Netherlands, September 9-11, 2009.
Choudhury, A D., G. Palermo, C. Silvano, and V. Zaccaria, "Yield Enhancement by Robust Application-specific Mapping on Network-on-Chips", NoCArc'09: Proceedings of the Second International Workshop on Network on-Chip Architectures, New York City, USA, pp. 37–42, December, 2009.

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