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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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Author Title [ Type(Asc)] Year
Prevostini, M., Introduction to SysML, , April 20, 2007.
Milosevic, J., A. Ferrante, and M. Malek, "A General Practitioner or a Specialist for Your Infected Smartphone?", 36th IEEE Symposium on Security and Privacy , San Jose, CA, USA, IEEE Computer Society Technical Committee on Security and Privacy, 05/2015.
Journal Article
Derin, O., P. Kuncheerat Ramankutty, P. Meloni, and E. Cannella, "Towards Self-adaptive KPN Applications on NoC-based MPSoCs", Advances in Software Engineering, vol. 2012, pp. 16 pages, September, 2012.
Banik, S., V. Mikhalev, F. Armknecht, T. Isobe, W. Meier, A. Bogdanov, Y. Watanabe, and F. Regazzoni, "Towards Low Energy Stream Ciphers", IACR Transactions on Symmetric Cryptology, In Press.
Milosevic, J., M. Malek, and A. Ferrante, "Time, Accuracy and Power Consumption Tradeoff in Mobile Malware Detection Systems", Computers & Security, vol. 82, pp. 314-328, 05/2019.
Pilato, C., S. Garg, K. Wu, R. Karri, and F. Regazzoni, "TaintHLS: High-Level Synthesis For Dynamic Information Flow Tracking", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, In Press.
Pilato, C., P. Mantovani, G. Di Guglielmo, and L. P. Carloni, "System-Level Optimization of Accelerator Local Memory for Heterogeneous Systems-on-Chip", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 36, pp. 435-448, 2017.
Derin, O., E. Cannella, G. Tuveri, P. Meloni, T. Stefanov, L. Fiorin, L. Raffo, and M. Sami, "A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project.", Microprocessors and Microsystems - Embedded Hardware Design, vol. 37, issue 6-7, pp. 515–529, 2013.
Becker, G., F. Regazzoni, C. Paar, and W. Burleson, "Stealthy Dopant-Level Hardware Trojans: Extended Version", Journal of Cryptographic Engineering, vol. 4, issue 1, pp. 19-31, 04/2014.
Gee, S. Bong, K. Chen Tan, and C. Alippi, "Solving Multiobjective Optimization Problems in Unknown Dynamic Environments: An Inverse Modeling Approach", IEEE Transactions on Cybernetics, vol. 47, issue 12, pp. 4223 - 4234, 11/2016, 2017.
Barenghi, A., G. Pelosi, and F. Regazzoni, "Simulation-Time Security Margin Assessment against Power-Based Side Channel Attacks", (IACR) Cryptology ePrint Archive, vol. 2014, 05/2014.
Pilato, C., S. Garg, R. Karri, and F. Regazzoni, "Securing Hardware Accelerators: a New Challenge for High-Level Synthesis", IEEE Embedded Systems Letters, vol. 3, issue 10, pp. 77-80, 11/2017, 2018.
Fiorin, L., G. Palermo, S. Luković, V. Catalano, and C. Silvano, "Secure Memory Accesses on Networks-on-Chip", IEEE Transactions on Computers, vol. 57, no. 9, pp. 1216-1229, September, 2008.
Taddeo, A V., and A. Ferrante, "Scheduling Small packets in IPSec Multi-accelerator Based Systems", Journal of Communication(JCM) Academy publisher, vol. 2, no. 2, Stresa, Italy, pp. 53-60, March, 2007.
Howe, J., A. Khalid, C. Rafferty, F. Regazzoni, and M. O'Neill, "On Practical Discrete Gaussian Samplers For Lattice-Based Cryptography", IEEE Transaction on Computers, In Press.