Export 58 results:
Author Title [ Type] Year Filters: First Letter Of Last Name is Z [Clear All Filters]
"Design Space Exploration for Run-Time Management of a Reconfigurable System for Video Streaming",
Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, 1: Springer, pp. 189-204, 2011.
"Design Space Exploration of a Reconfigurable System for Supporting Video Streaming Run-time Management",
Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, New York, USA, Springer, 2011.
"Design Space Exploration of Parallel Architectures",
Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, New York, USA, Springer, 2011.
"Design Space Exploration Supporting Run-time Resource Management",
Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, New York, USA, Springer, 2011.
"The MULTICUBE Design Flow",
Multi-objective Design Space Exploration of Multiprocessor SoC Architectures: Springer New York, pp. 3-17, 2011.
"The MULTICUBE Design Flow",
Multi-objective Design Space Exploration of Multiprocessor SoC Architectures: Springer New York, pp. 3-17, 2011.
"MULTICUBE: Multi-Objective Design Space Exploration of Multi-Core Architectures",
VLSI 2010 Annual Symposium, vol. 105, Netherlands, Springer, pp. 47-63, 2011.
"MULTICUBE: Multi-Objective Design Space Exploration of Multi-Core Architectures",
VLSI 2010 Annual Symposium, vol. 105, Netherlands, Springer, pp. 47-63, 2011.
"Optimization Algorithms for Embedded System Design Space Exploration",
Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, New York, USA, Springer, 2011.
"Response Surface Modeling for Embedded System Design Space Exploration",
Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, New York, USA, Springer, 2011.
"About the Performances of the Advanced Encryption Standard in Embedded Systems with Cache Memory",
ISCAS 2003, Bangkok, pp. 145-148, May 25-28, 2003.
"ARTE: an Application-specific Run-Time Management Framework for Multi-core Systems",
Proceedings IEEE SASP'11 - Symposium on Application Specific Processors, San Diego, CA, USA, June, 2011.
"COOPER: Towards A Collaborative Open Environment of Project-centred Learning",
proceedings to EC-TEL'06 conference, Crete, Greece, October 1-4, 2006.
"COOPER: Towards A Collaborative Open Environment of Project-centred Learning",
proceedings to EC-TEL'06 conference, Crete, Greece, October 1-4, 2006.
"A Correlation-based Design Space Exploration Methodology for Multi-Processor Systems-on-Chip",
Proceedings of DAC 2010: Design Automation Conference, Anheim, CA, USA, pp. 120–125, June, 2010.
"Cross-layer Design of Reconfigurable Cyber-Physical Systems",
Proceedings of Design, Automation and Test in Europe (DATE) 2017, 2017.
"A Design Space Exploration Methodology Supporting Run-Time Resource Management for Multi-Processors System on-Chip",
Proceedings IEEE SASP'09 - Symposium on Application Specific Processors, San Francisco, CA, USA, July, 2009.
"Detecting changes in sequences of attributed graphs",
2017 IEEE Symposium Series on Computational Intelligence (SSCI), Nov, 2017.
"An Efficient Design Space Exploration Methodology for Multi-Cluster VLIW Architectures based on Artificial Neural Networks",
Proc. IFIP International Conference on Very Large Scale Integration VLSI - SoC 2008, Rhodes Island, Greece, October 13-15, 2008.
"An Efficient Run-Time Management Methodology for Stereo Matching Application",
2PARMA: Proceedings of the Workshop on Parallel Programming and Run-time Management Techniques for Many-core Architectures, Hannover, Germany, February, 2010.