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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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K
Krdu, A., Y. Lebrun, U. Ahmad, S. Pollin, and M. Li, "Beamforming for interference mitigation and its implementation on an SDR baseband processor", SiPS'11: Proceedings of the IEEE Workshop on Signal Processing Systems, Beirut, Lebanon, pp. 1–6, October 4-7, 2011.
Kozma, R., C. Alippi, Y. Choe, and F. Morabito, "Artificial Intelligence in the Age of Neural Networks and Brain Computing", Academic Press , 1, pp. 420, 2018.
Khalid, A., J. Howe, C. Rafferty, F. Regazzoni, and M. O'Neil, "Compact, Scalable, and Efficient Gaussian Samplers for Lattice-Based Cryptography", Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS) 2018, 2018.
Kerckhof, S., F. Durvaux, N. Veyrat-Charvillon, F. Regazzoni, G. Meurice de Dormale, and F-X. Standaert, "Low Cost FPGA Implementations of the SHA-3 Finalists", 10th Smart Card Research and Advanced Application Conference (CARDIS), Leuven, Belgium, September, 2011.
Kavka, C., A. Turco, G. Palermo, C. Silvano, V. Zaccaria, G. Mariani, S. Bocchio, and F. Dongrui, "Design Space Exploration of Parallel Architectures", Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, New York, USA, Springer, 2011.
Kakuda, Y., T. Ohta, and M. Malek, "Self-Organizing Real-Time Services in Mobile Ad Hoc Networks", Self-Organization in Embedded Real-Time Systems: Springer New York, pp. 55-74, 2013.
Kaitović, I., R. Rezende, C. Murillo, and C. Fantuzzi, "Model-driven approach to design ICT infrastructure for precision farming", 17th IEEE Conference on Emerging Technologies and Factory Automation (ETFA), Kraków, Poland, IEEE Industrial Electronics Society, 09/2012.
Kaitović, I., F. Obradović, S. Luković, and M. Malek, "A Framework for Disturbance Analysis in Smart Grids by Fault Injection", Springer Journal on "Computer Science - Research and Development", 09/2016.
Kaitović, I., S. Luković, and M. Malek, "Proactive Failure Management in Smart Grids for Improved Resilience (A Methodology for Failure Prediction and Mitigation)", IEEE GLOBECOM SmartGrid Resilience (SGR) Workshop, San Diego, CA, USA, 12/2015.
Kaitović, I., and M. Malek, "Impact of Failure Prediction on Availability: Modeling and Comparative Analysis of Predictive and Reactive Methods", IEEE Transactions on Dependable and Secure Computing, pp. 1-1, 2018.
Kaitović, I., S. Luković, and M. Malek, "Unifying Dependability of Critical Infrastructures: Electric Power System and ICT (Concepts, Figures of Merit and Taxonomy)", IEEE Pacific Rim International Symposium on Dependable Computing (PRDC), Zhangjiajie, China, 11/2015.
Kaitović, I., and M. Malek, "Optimizing Failure Prediction to Maximize Availability", 13th IEEE International Conference on Autonomic Computing (ICAC), Würzburg, Germany, 07/2016.
Kaitović, I., and S. Luković, "Adoption of Model-Driven methodology to aggregations design in Power Grid", INDIN '11: Proceedings of the 9th IEEE International Conference on Industrial Informatics, Caparica, Lisbon, Portugal, pp. 1–6, July 26-29, 2011.
H
Howe, J., A. Khalid, C. Rafferty, F. Regazzoni, and M. O'Neill, "On Practical Discrete Gaussian Samplers For Lattice-Based Cryptography", IEEE Transaction on Computers, In Press.
Howe, J., C. Moore, M. O'Neill, F. Regazzoni, T. Güneysu, and K.. Beeden, "Standard lattices in hardware", Proceedings of the 53rd Annual Design Automation Conference DAC 2016, Austin, TX, USA, ACM, pp. 162, 06/2016.
Homulle, H., F. Regazzoni, and E. Charbon, "200 MS/s ADC implemented in a FPGA employing TDCs", FPGA International Symposium on Field-Programmable Gate Arrays ACM/SIGDA 2015, Monterey, CA, USA, ACM, pp. 228-235, 02/2015.
Hocquet, C., D. Kamel, F. Regazzoni, J-D. Legat, D. Flandre, D. Bol, and F-X. Standaert, "Harvesting the potential of nano-CMOS for lightweight cryptography: An ultra-low-voltage 65 nm AES coprocessor for passive RFID tags", Springer Journal of Cryptographic Engineering, vol. 1, issue 1, 2011.
G
Guo, X., N. Karimi, F. Regazzoni, C. Jin, and R. Karri, "Simulation and Analysis of Negative-Bias Temperature Instability Aging on Power Analysis Attacks", IEEE Int. Symposium on Hardware-Oriented Security and Trust, McLean, VA, USA, 05/2015.
Güneys, T., F. Regazzoni, P. Sasdrich, and M. Wojcik, "(THOR) - The hardware onion router", 24th International Conference on Field Programmable Logic and Applications, (FPL) 2014, Munich, Germany, IEEE, 09/2014.
Giesbers, B., A V. Taddeo, W. van der Vegt, J. van Bruggen, and R. Koper, "A Question Answering service for information retrieval in Cooper", COOPER Workshop in conjunction with EC-TEL07 Conference, September 17, 2007.

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