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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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Milic, B., and M. Malek, "NPART - node placement algorithm for realistic topologies in wireless multihop network simulation", Proceedings of the 2nd International Conference on Simulation Tools and Techniques, ICST, Brussels, Belgium, Belgium, ICST (Institute for Computer Sciences, Social-Informatics and Telecommunications Engineering), 2009.
Mentens, N., E. Charbon, and F. Regazzoni, Reconfigurable Logic Circuit, , no. GB1719355.8, 11/2017, Submitted.
Mentens, N., E. Charbon, and F. Regazzoni, "Rethinking Secure FPGAs: TowardsCryptography-friendly Configurable Cell Architecture and its Automated Design Flow", Proceedings of FCCM, 05/2018.
Meloni, P., G. Tuveri, L. Raffo, E. Cannella, T. Stefanov, O. Derin, L. Fiorin, and M. Sami, "System Adaptivity and Fault-tolerance in NoC-based MPSoCs: the MADNESS Project Approach", Proceedings of the 15th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools (DSD'12), Izmir, Turkey, September 5-8, 2012.
Medwed, M., F-X. Standaert, J. Großschädl, and F. Regazzoni, "Fresh Re-Keying: Security against Side-Channel and Fault Attacks for Low-Cost Devices", Proceedings of Progress in Cryptology - Africacrypt, Stellenbosch, South Africa, May, 2010.
Medwed, M., C. Petit, F. Regazzoni, M. Renauld, and F-X. Standaert, "Fresh Re-Keying II: Securing Multiple Parties against Side-Channel and Fault Attacks", 10th Smart Card Research and Advanced Application Conference (CARDIS), Leuven, Belgium, September, 2011.
Masin, M., F. Palumbo, H. Myrhaug, J. A. de Oliv Filho, M. Pastena, M. Pelcat, L. Raffo, F. Regazzoni, A. A. Sanchez, A. Toffetti, et al., "Cross-layer Design of Reconfigurable Cyber-Physical Systems", Proceedings of Design, Automation and Test in Europe (DATE) 2017, 2017.
Mariani, G., G. Palermo, V. Zaccaria, A. Brankovic, J. Jovic, and C. Silvano, "A Correlation-based Design Space Exploration Methodology for Multi-Processor Systems-on-Chip", Proceedings of DAC 2010: Design Automation Conference, Anheim, CA, USA, pp. 120–125, June, 2010.
Mariani, G., G. Palermo, V. Zaccaria, and C. Silvano, "ARTE: an Application-specific Run-Time Management Framework for Multi-cores based on Queuing Models", Parallel Computing, 2013.
Mariani, G., V-M. Sima, G. Palermo, V. Zaccaria, C. Silvano, and K. Bertels, "Using Multi-objective Design Space Exploration to Enable Run-time Resource Management for Reconfigurable Architectures", Proc. Design, Automation Test in Europe Conf. Exhibition (DATE), March, 2012.
Mariani, G., G. Palermo, V. Zaccaria, and C. Silvano, "Design-space Exploration and Runtime Resource Management for Multicores", ACM Transactions on Embedded Computing Systems (TECS) - Special issue on application-specific processors, vol. 13, issue 2, pp. 20:1–20:27, 09/2013.
Mariani, G., G. Palermo, C. Silvano, and V. Zaccaria, "Multicube Explorer - A Design Space Exploration Framework for Embedded Systems-on-Chip", Proceedings of the DATE'09 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, Nice, France, April, 2009.
Mariani, G., G. Palermo, C. Silvano, and V. Zaccaria, "A Design Space Exploration Methodology Supporting Run-Time Resource Management for Multi-Processors System on-Chip", Proceedings IEEE SASP'09 - Symposium on Application Specific Processors, San Francisco, CA, USA, July, 2009.
Mariani, G., P. Avasare, C. Ykman-Couvreur, G. Vanmeerbeeck, G. Palermo, C. Silvano, and V. Zaccaria, "Design Space Exploration for Run-Time Management of a Reconfigurable System for Video Streaming", Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, 1: Springer, pp. 189-204, 2011.
Mariani, G., G. Palermo, C. Silvano, and V. Zaccaria, "ARTE: an Application-specific Run-Time Management Framework for Multi-core Systems", Proceedings IEEE SASP'11 - Symposium on Application Specific Processors, San Diego, CA, USA, June, 2011.
Mariani, G., P. Avasare, G. Vanmeerbeeck, C. Ykman-Couvreur, G. Palermo, C. Silvano, and V. Zaccaria, "An industrial design space exploration framework for supporting run-time resource management on multi-core systems", Proceedings of Design, Automation and Test in Europe (DATE) Conference, Dresden, Germany, March, 2010.
Mariani, G., P. Avasare, C. Ykman-Couvreur, G. Vanmeerbeeck, G. Palermo, C. Silvano, and V. Zaccaria, "Design Space Exploration of a Reconfigurable System for Supporting Video Streaming Run-time Management", Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, New York, USA, Springer, 2011.
Mariani, G., V-M. Sima, G. Palermo, V. Zaccaria, G. Marchiori, C. Silvano, and K. Bertels, "Run-time Optimization of a Dynamically Reconfigurable Embedded System Through Performance Prediction", 23rd International Conference on Field Programmable Logic and Applications (FPL), Porto, Portugal, IEEE, 09/2013.
Mariani, G., G. Palermo, C. Silvano, and V. Zaccaria, "Meta-model Assisted Optimization for Design Space Exploration of Multi-Processor Systems-on-Chip", Euromicro Proceedings of DSD'09 - Conference on Digital System Design, Patras, Greece, August, 2009.
Mariani, G., G. Palermo, C. Silvano, and V. Zaccaria, "Multiprocessor System-on-Chip Design Space Exploration based on Multi-level Modeling Techniques", Proceedings of IEEE IC-SAMOS'09 - International Conference on Embedded Computer Systems: Architectures, MOdeling, and Simulation, Samos, Greece, July, 2009.

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