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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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Ferrante, A., and V. Piuri, "High-level Architecture of an IPSec-dedicated System on Chip", proceedings of NGI 2007, Trondheim, Norway, IEEE Press, May, 2007.
Ferrante, A., M. Malek, F. Martinelli, F. Mercaldo, and J. Milosevic, "Extinguishing Ransomware - A Hybrid Approach to Android Ransomware Detection", Foundations and Practice of Security, vol. 10723, Cham, Springer International Publishing, pp. 242-258, 02/2018.
Ferrante, A., J. Milosevic, and M. Janjusevic, "A Security-enhanced Design Methodology For Embedded Systems", ICETE SECRYPT 2013, Reykjavik, Iceland, ICETE, 07/2013.
Ferrante, A., I. Kaitović, and J. Milosevic, "Modeling Requirements For Security-enhanced Design of Embedded Systems", ICETE SECRYPT, Vienna, Austria, ICETE, 08/2014.
Ferrante, A., M. Chelodi, F. Bruschi, and V. Mozzetti, "An Algorithm for Extended Dynamic Range Video in Embedded Systems", SENSORNETS 2013 - 2nd International Conference on Sensor Networks, Barcelona, Spain, INSTICC, 02/2013.
Ferrante, A., S. Chandra, and V. Piuri, "A Query Unit for the IPSec Databases", SECRYPT 2007, Barcelona, Spain, 07/2007.
Ferrante, A., R. Pompei, A. Stulova, and A V. Taddeo, "A Protocol For Pervasive Distributed Computing Reliability", SecPri_WiMob 2008, Avignon, France, IEEE, 10/2008.
Ferrante, A., S. Chandra, and V. Piuri, "IPSec Database Query Acceleration", E-business and Telecommunications, vol. 23: Springer Berlin Heidelberg, pp. 188-200, 2009.
Ferrante, A., G. Piscopo, and S. Scaldaferri, "Application-Driven Optimization of VLIW Architectures: A Hardware-Software Approach", RTAS '05: Proceedings of the 11th IEEE Real Time on Embedded Technology and Applications Symposium, Washington, DC, USA, IEEE Computer Society, pp. 128–137, 03/2005.
Ferrante, A., F. Mercaldo, J. Milosevic, and C. Aaron Visaggio, "Spotting the Malicious Moment: Characterizing Malware Behavior Using Dynamic Features", 2016 11th International Conference on Availability, Reliability and Security (ARES), Salzburg, Austria, 08/2016.
Ferrante, A., A V. Taddeo, M. Sami, F. Mantovani, and J. Fridkins, "Self-adaptive Security at Application Level: a Proposal", ReCoSoC 2007, Jun. 2007, in proceedings of ReCoSoC 2007, June, 2007.
Ferrari, F., and E. Amador, "Design exploration for an Ogg/Vorbis decoder for VLIW architectures", Workshop on Application Specific Processors (WASP '07), Salzburg, Austria, October, 2007.
Fezzardi, P., C. Pilato, and F. Ferrandi, "Enabling Automated Bug Detection for IP-based Designs using High-Level Synthesis", IEEE Design & Test, 2018, In Press.
Fiorin, L., L. Micconi, and M. Sami, "Design of Fault Tolerant Network Interfaces for NoCs", Proceedings of 14th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools (DSD'11), Oulu, Finland, September, 2011.
Fiorin, L., G. Palermo, and C. Silvano, "A Monitoring System for NoCs", Proceedings of the Third International Workshop on Network on Chip Architectures (NoCArc'2010), Atlanta, Georgia, USA, December, 2010.
Fiorin, L., S. Luković, and G. Palermo, "Implementation of a Reconfigurable Data Protection Module for NoC-based MPSoCs", Proceedings of the 21st IPDPS 2007 Reconfigurable Architecture Workshop (RAW), 21th IEEE International Parallel and Distributed Processing Symposium, Miami, USA/FL, April, 2008.
Fiorin, L., G. Palermo, C. Silvano, and H. Elmiligi, "Security in NoC", Networks-on-Chips: Theory and Practice: Taylor and Francis Group, LLC - CRC Press, pp. 157-194, 2009.
Fiorin, L., G. Palermo, and C. Silvano, "A Security Monitoring Service for NoCs", Sixth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'08), Atlanta, Georgia, USA., 10/2008.
Fiorin, L., and M. Sami, "Fault-Tolerant Network Interfaces for Networks-on-Chip", IEEE Trans. Dependable Secur. Comput., vol. 11, issue 1, pp. 16–29, 01/2014.
Fiorin, L., G. Palermo, S. Luković, V. Catalano, and C. Silvano, "Secure Memory Accesses on Networks-on-Chip", IEEE Transactions on Computers, vol. 57, no. 9, pp. 1216-1229, September, 2008.

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