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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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Author Title [ Type(Desc)] Year
Journal Article
Bianchi, F. Maria, L. Livi, and C. Alippi, "Investigating echo state networks dynamics by means of recurrence analysis", IEEE Transactions on Neural Networks and Learning Systems, vol. 29, pp. 427 - 439, 02/2018.
Brannigan, S., N. Smyth, T. Oder, F. Valencia, E. O'Sullivan, T. Güneysu, and F. Regazzoni, "An Investigation of Sources of Randomness Within Discrete Gaussian Sampling", IACR Cryptology ePrint Archive, vol. 2017, pp. 298, 2017.
Zhao, D., L. Bu, C. Alippi, and Q. Wei, "A Kolmogorov-Smirnov Test to Detect Changes in Stationarity in Big Data", IFAC-PapersOnLine, vol. 50, pp. 14260 - 14265, 2017.
Ykman-Couvreur, C., P. Avasare, G. Mariani, V. Zaccaria, G. Palermo, and C. Silvano, "Linking run-time resource management of embedded multi-core platforms with automated design-time exploration", IET Computers and Digital Techniques, vol. 5, no. -, pp. 123–135, 2011.
Derin, O., E. Diken, and L. Fiorin, "A Middleware Approach to Achieving Fault-tolerance of Kahn Process Networks on Networks-on-Chips", International Journal of Reconfigurable Computing, vol. 2011, no. Article ID 295385: Hindawi, pp. 14 pages, February, 2011.
Regazzoni, F., S. Banik, A. Bogdanov, T. Isobe, K. Shibutani, H. Hiwatari, and T. Akishita, "Midori: (A) Block Cipher for Low Energy (Extended Version)", (IACR) Cryptology ePrint Archive, vol. 2015, 12/2015.
Alippi, C., S. Ntalampiras, and M. Roveri, "Model-Free Fault Detection and Isolation in Large-Scale Cyber-Physical Systems", IEEE Transactions on Emerging Topics in Computational Intelligence, vol. 1, pp. 61-71, Feb, 2017.
Bianchi, F. Maria, L. Livi, C. Alippi, and R. Jenssen, "Multiplex visibility graphs to investigate recurrent neural network dynamics", Nature-Scientific reports, vol. 7, pp. 44037-44049, 03/2017.
Alippi, C., and M. Roveri, "The (Not) Far-Away Path to Smart Cyber-Physical Systems: An Information-Centric Framework", Computer, vol. 50, pp. 38-47, April, 2017.
Livi, L., and C. Alippi, "One-class classifiers based on entropic spanning graphs", IEEE Transactions on Neural Networks and Learning Systems, vol. 28, issue 12, pp. 2846 - 2858, 11/2016, 2017.
Mariani, G., G. Palermo, C. Silvano, and V. Zaccaria, "OSCAR: an Optimization Methodology Exploiting Spatial Correlation in Multi-core Design Space", IEEE Transactions on Computer-Aided Design, vol. 21, issue 5, no. -: IEEE, pp. 740-753, 05/2012.
Bo, L., C. Alippi, and D. Zhao, "A Pdf-free Change Detection Test Based on Density Difference Estimation", IEEE Transactions on Neural Networks and Learning Systems, vol. 29, issue 2, pp. 324 - 334, 11/2016, 2018.
Howe, J., A. Khalid, C. Rafferty, F. Regazzoni, and M. O'Neill, "On Practical Discrete Gaussian Samplers For Lattice-Based Cryptography", IEEE Transaction on Computers, In Press.
Taddeo, A V., and A. Ferrante, "Scheduling Small packets in IPSec Multi-accelerator Based Systems", Journal of Communication(JCM) Academy publisher, vol. 2, no. 2, Stresa, Italy, pp. 53-60, March, 2007.
Fiorin, L., G. Palermo, S. Luković, V. Catalano, and C. Silvano, "Secure Memory Accesses on Networks-on-Chip", IEEE Transactions on Computers, vol. 57, no. 9, pp. 1216-1229, September, 2008.
Pilato, C., S. Garg, R. Karri, and F. Regazzoni, "Securing Hardware Accelerators: a New Challenge for High-Level Synthesis", IEEE Embedded Systems Letters, vol. 3, issue 10, pp. 77-80, 11/2017, 2018.
Barenghi, A., G. Pelosi, and F. Regazzoni, "Simulation-Time Security Margin Assessment against Power-Based Side Channel Attacks", (IACR) Cryptology ePrint Archive, vol. 2014, 05/2014.
Gee, S. Bong, K. Chen Tan, and C. Alippi, "Solving Multiobjective Optimization Problems in Unknown Dynamic Environments: An Inverse Modeling Approach", IEEE Transactions on Cybernetics, vol. 47, issue 12, pp. 4223 - 4234, 11/2016, 2017.
Becker, G., F. Regazzoni, C. Paar, and W. Burleson, "Stealthy Dopant-Level Hardware Trojans: Extended Version", Journal of Cryptographic Engineering, vol. 4, issue 1, pp. 19-31, 04/2014.
Derin, O., E. Cannella, G. Tuveri, P. Meloni, T. Stefanov, L. Fiorin, L. Raffo, and M. Sami, "A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project.", Microprocessors and Microsystems - Embedded Hardware Design, vol. 37, issue 6-7, pp. 515–529, 2013.