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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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Krdu, A., Y. Lebrun, U. Ahmad, S. Pollin, and M. Li, "Beamforming for interference mitigation and its implementation on an SDR baseband processor", SiPS'11: Proceedings of the IEEE Workshop on Signal Processing Systems, Beirut, Lebanon, pp. 1–6, October 4-7, 2011.
Regazzoni, F., A C. Nacul, and M. Lajolo, "Automatic Synthesis of the Hardware/Software Interface in Multiprocessor Architectures", FDL'05 - Forum on Specification and Design Languages, Lausanne, Switzerland, September 27-30, 2005.
Bayrak, A. Galip, F. Regazzoni, D. Novo Bruna, P. Brisk, F-X. Standaert, and P. Ienne, "Automatic Application of Power Analysis Countermeasures", IEEE Transactions on Computers, vol. PP, issue 99, 12/2013.
Bayrak, A. Galip, F. Regazzoni, D. Novo, P. Brisk, F-X. Standaert, and P. Ienne, "Automatic Application of Power Analysis Countermeasures", IEEE Transactions on Computers , vol. 64, issue 2, pp. 329-341, 02/2015.
Luković, S., and L. Fiorin, "An Automated Design Flow for NoC-based MPSoCs on FPGA", RSP 2008, The 19th IEEE/IFIP International Symposium on Rapid System Prototyping, Monterey, USA/CA, June 2-5, 2008.
Banik, S., A. Bogdanov, and F. Regazzoni, "Atomic-AES: A Compact Implementation of the AES Encryption/Decryption Core", Proceedings of 17th International Conference on Cryptology in India (INDOCRYPT) 2016, 2016.
Macchetti, M., and W. Chen, "ASIC Hardware Implementation of the IDEA NXT Encryption Algorithm", IEEE International Symposium on Circuits and Systems, Kos, Greece, May 21-24, 2006.
Dadda, L., M. Macchetti, and J. Owen, "An ASIC design for a high speed implementation of the hash function SHA-256 (384, 512)", GLSVLSI '04: Proceedings of the 14th ACM Great Lakes symposium on VLSI, Boston, MA, USA, ACM Press, New York, USA, pp. 421–425, 2004.
Kozma, R., C. Alippi, Y. Choe, and F. Morabito, "Artificial Intelligence in the Age of Neural Networks and Brain Computing", Academic Press , 1, pp. 420, 2018.
Mariani, G., G. Palermo, V. Zaccaria, and C. Silvano, "ARTE: an Application-specific Run-Time Management Framework for Multi-cores based on Queuing Models", Parallel Computing, 2013.
Mariani, G., G. Palermo, C. Silvano, and V. Zaccaria, "ARTE: an Application-specific Run-Time Management Framework for Multi-core Systems", Proceedings IEEE SASP'11 - Symposium on Application Specific Processors, San Diego, CA, USA, June, 2011.
Giaconia, M., M. Macchetti, F. Regazzoni, and K. Schramm, "Area and Power Efficient Synthesis of DPA-Resistant Cryptographic SBoxes", International Conference on VLSI Design & Embedded Systems, Bangalore, India, January 6-10, 2007.
Luković, S., A. Gasparin, J. Witzig, and I. Herbst, "Arbon Demonstrator Eye-on-the-Grid, from Concept to Results", SCCER-FURIES Annual Conference, 12/2018.
Palermo, G., G. Mariani, C. Silvano, R. Locatelli, and M. Coppola, "Application-Specific Topology Design Customization for STNoC", DSD07, in proceedings of 10th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools (DSD 07), Lübeck, Germany, August 29-31, 2007.
Ferrante, A., G. Piscopo, and S. Scaldaferri, "Application-Driven Optimization of VLIW Architectures: A Hardware-Software Approach", RTAS '05: Proceedings of the 11th IEEE Real Time on Embedded Technology and Applications Symposium, Washington, DC, USA, IEEE Computer Society, pp. 128–137, 03/2005.
Alippi, C., A. Galbusera, and M. Stellini, "An Application Level Synthesis Methodology for Multidimensional Embedded Processing Systems", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 22, no. 11, pp. 1457-1470, November, 2003.
Alippi, C., A. Galbusera, and M. Stellini, "An Application Level Synthesis Methodology for Embedded Systems", ISCAS 2002, Scottsdale, pp. 473-476, May 26-29, 2002.
Zambon, D., L. Livi, and C. Alippi, "Anomaly and Change Detection in Graph Streams through Constant-Curvature Manifold Embeddings", IJCNN 2018 : International Joint Conference on Neural Networks, 07/2018.
Ferrante, A., M. Chelodi, F. Bruschi, and V. Mozzetti, "An Algorithm for Extended Dynamic Range Video in Embedded Systems", SENSORNETS 2013 - 2nd International Conference on Sensor Networks, Barcelona, Spain, INSTICC, 02/2013.
Negri, L., and U. Bondi, "The ALaRI Intranet: a Remote Collaboration Platform for a Worldwide Learning and Research Network", World Conference on Educational Multimedia, Hypermedia and Telecommunications 04 (ED-MEDIA 04), Lugano, Switzerland, AACE Press, pp. 5042-5047, 2004.