ALaRI Hang Glider

Search form

Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
Search by content:
Search by:
Export 352 results:
[ Author(Desc)] Title Type Year
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 
Pilato, C., F. Regazzoni, R. Karri, and S. Garg, "TAO: Techniques for Algorithmic Obscuration during High-Level Synthesis", Proceedings of the ACM/IEEE Design Automation Conference (DAC), 2018.
Piscitelli, R., S. Bhasin, and F. Regazzoni, "Fault attacks, injection techniques and tools for simulation", 10th International Conference on Design Technology of Integrated Systems in Nanoscale Era DTIS 2015, Naples, Italy, IEEE, pp. 1-6, 04/2015.
Piscitelli, R., S. Bhasin, and F. Regazzoni, "Fault Attacks, Injection Techniques and Tools for Simulation", Hardware Security and Trust: Design and Deployment of Integrated Circuits in a Threatened Environment, First edition; 2016: Springer, pp. 149-167, 2017.
Piscopo, G., M. Prevostini, and I. Stefanini, "UML System-Level Analysis and Design of Secure Communication Schemes for Embedded Systems", FDL'04, Lille, France, pp. 301-312, September 14-17, 2004.
Polian, I., G. Becker, and F. Regazzoni, "Trojans in Early Design Steps - An Emerging Threat", TRUDEVICE Final Conference (FCTRU’16), 2016.
Powolny, F., S. Burri, C. Bruschini, X. Michalet, F. Regazzoni, and E. Charbon, "Comparison of Two Cameras based on Single Photon Avalanche Diodes (SPADS) for Fluorescence Lifetime Imaging Application with Picosecond Resolution", International Image Sensor Workshop (IISW), Snowbird Resort, Utah, USA, June, 2013.
Prevostini, M., A V. Taddeo, K. Balać, M. Jermini, and C. Linder, "Calibration and in-Field Validation Tests of a Web-based Adaptive Management System for Monitoring - Scaphoideus titanus", Future Integrated Pest Management in Europe, 2013.
Prevostini, M., Introduction to SysML, , April 20, 2007.
Prevostini, M., F. Balzarini, A N. Kostadinov, S. Mankan, A. Martinola, and A. Minosi, "UML-based specifications of an embedded system oriented to HW/SW partitioning: a case study", Languages for system specification: Selected contributions on UML, systemC, system Verilog, mixed-signal systems, and property specification from FDL'03, Norwell, MA, USA, Kluwer Academic Publishers, pp. 71-84, 2004.
Prevostini, M., A V. Taddeo, K. Balać, I. Rigamonti, J. Baumgärtner, and M. Jermini, "WAMS - an adaptive system for knowledge acquisition and decision support: the case of Scaphoideus titanus", IOBC/WPRS European Meeting, Lacanau, France, Working Group on Integrated Protection and Production in Viticulture, pp. 57-64, 10/2011.
Regazzoni, F., and M. Lajolo, "Hardware/Software Partitioning and Interface Synthesis in Networks On Chip", IP Based SoC Design 2005, Grenoble, France, December 7-8, 2005.
Regazzoni, F., and M. Lajolo, "Interface Synthesis in Multiprocessing Systems-on-Chips", IP Based SoC Design 2004, Grenoble, December, 2004.
Regazzoni, F., A. Cevrero, F-X. Standaert, S. Badel, T. Kluter, P. Brisk, Y. Leblebici, and P. Ienne, "A Design Flow and Evaluation Framework for DPA-resistant Instruction Set Extensions", Cryptographic Hardware and Embedded Systems (CHES), vol. 5747, Lausanne, Switzerland, Springer Berlin Heidelberg, pp. 205-219, September, 2009.
Regazzoni, F., R. Graves, G. Di Natale, L. Batina, S. Bhasin, B. Ege, A. P. Fournaris, N. Mentens, S. Picek, V. Rozic, et al., "Challenges in designing trustworthy cryptographic co-processors", IEEE International Symposium on Circuits and Systems (ISCAS) 2015, Lisbon, Portugal, IEEE, pp. 2009-2012, 09/2015.
Regazzoni, F., T. Eisenbarth, J. Großschädl, L. Breveglieri, P. Ienne, I. Koren, and C. Paar, "Power Attacks Resistance of Cryptographic S-boxes with added Error Detection Circuits", proceedings of: '22nd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'07), Rome, Italy, September 26-28, 2007.
Regazzoni, F., W. Yi, and F-X. Standaert, "FPGA Implementations of the AES Masked Against Power Analysis Attacks", 2nd International Workshop on Constructive Side-Channel Analysis and Secure Design (COSADE), Darmstadt, Germany, February, 2011.
Regazzoni, F., I. Bonesana, M. Djakov, and A. Mattiuz, "Tairona, an Open Source Platform for Worldwide Meeting and Tutoring", World Conference on Educational Multimedia, Hypermedia and Telecommunications 7 (ED-MEDIA 07), Vancouver, Canada, 2007.
Regazzoni, F., L. Breveglieri, P. Ienne, and I. Koren, "Interaction between Fault Attack Countermeasures and the Resistance against Power Analysis Attacks", Fault Analysis in Cryptography: Springer Berlin Heidelberg, pp. 257-272, 2012.
Regazzoni, F., A. Fowler, and I. Polian, "Quantum Era Challenges for Classical Computers", Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, New York, NY, USA, ACM, 2018.
Regazzoni, F., "Physical Attacks and Beyond", Proceedings of the Selected Areas in Cryptography: 23nd International Conference (SAC) 2016, 2016.