ALaRI Hang Glider

Search form

Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
Search by content:
Search by:
Export 352 results:
Author [ Title(Asc)] Type Year
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 
G
Milosevic, J., A. Ferrante, and M. Malek, "A General Practitioner or a Specialist for Your Infected Smartphone?", 36th IEEE Symposium on Security and Privacy , San Jose, CA, USA, IEEE Computer Society Technical Committee on Security and Privacy, 05/2015.
F
Luković, S., I. Kaitović, M. Mura, and U. Bondi, "Functional requirements of embedded systems for monitoring and control structure of Virtual Power Plants", Proceedings of the 2009 IEEE Workshop on Environmental, Energy, and Structural Monitoring Systems, Crema, Italy, September, 2009.
Luković, S., I. Kaitović, M. Mura, U. Bondi, F. Kulić, and D. Popović, "Functional model of Virtual Power Plant (VPP)", Proceedings of the 2010 CIGRE (International Council on Large Electric Systems) Session, Paris, France, July, 2010.
Negri, L., M. Sami, D. Macii, and A. Terranegra, "FSM–based power modeling of wireless protocols: the case of bluetooth", ISLPED '04: Proceedings of the 2004 international symposium on Low power electronics and design, Newport Beach, California, USA, ACM Press, New York, USA, pp. 369-374, 2004.
Salvioni, C., "From a young academic institute a broad minded approach: the working and learning environment of the ALaRI Intranet tool (case study)", MICROLEARNING 2005: Learning & Working in New Media Environments, Innsbruck, Austria, June 23-24, 2005.
Milosevic, J., M. Malek, and A. Ferrante, "A Friend or a Foe? Detecting Malware Using Memory and CPU Features", SECRYPT 2016, 13th International Conference on Security and Cryptography, Lisbon, Portugal, SciTePress Digital Library, 07/2016.
Medwed, M., F-X. Standaert, J. Großschädl, and F. Regazzoni, "Fresh Re-Keying: Security against Side-Channel and Fault Attacks for Low-Cost Devices", Proceedings of Progress in Cryptology - Africacrypt, Stellenbosch, South Africa, May, 2010.
Medwed, M., C. Petit, F. Regazzoni, M. Renauld, and F-X. Standaert, "Fresh Re-Keying II: Securing Multiple Parties against Side-Channel and Fault Attacks", 10th Smart Card Research and Advanced Application Conference (CARDIS), Leuven, Belgium, September, 2011.
Taddeo, A V., L G G. Morales, and A. Ferrante, "A Framework for Security and Workload Gradual Adaptation", SECRYPT, Seville, Spain, ICETE, 07/2011.
Kaitović, I., F. Obradović, S. Luković, and M. Malek, "A Framework for Disturbance Analysis in Smart Grids by Fault Injection", Springer Journal on "Computer Science - Research and Development", 09/2016.
Regazzoni, F., W. Yi, and F-X. Standaert, "FPGA Implementations of the AES Masked Against Power Analysis Attacks", 2nd International Workshop on Constructive Side-Channel Analysis and Secure Design (COSADE), Darmstadt, Germany, February, 2011.
Negri, L., M. Sami, Q D. Tran, and D. Zanetti, "Flexible Power Modeling for Wireless Systems: Power Modeling and Optimization of two Bluetooth Implementations", WOWMOM '05: Proceedings of the Sixth IEEE International Symposium on a World of Wireless Mobile and Multimedia Networks (WoWMoM'05), Washington, DC, USA, IEEE Computer Society, pp. 408–416, 2005.
Bayrak, A. Galip, F. Regazzoni, P. Brisk, F-X. Standaert, and P. Ienne, "A First Step Towards Automatic Application of Power Analysis Countermeasures", 48th Design Automation Conference (DAC), San Diego, Califorina, June, 2011.
Fiorin, L., and M. Sami, "Fault-Tolerant Network Interfaces for Networks-on-Chip", IEEE Trans. Dependable Secur. Comput., vol. 11, issue 1, pp. 16–29, 01/2014.
Piscitelli, R., S. Bhasin, and F. Regazzoni, "Fault attacks, injection techniques and tools for simulation", 10th International Conference on Design Technology of Integrated Systems in Nanoscale Era DTIS 2015, Naples, Italy, IEEE, pp. 1-6, 04/2015.
Piscitelli, R., S. Bhasin, and F. Regazzoni, "Fault Attacks, Injection Techniques and Tools for Simulation", Hardware Security and Trust: Design and Deployment of Integrated Circuits in a Threatened Environment, First edition; 2016: Springer, pp. 149-167, 2017.
Bol, D., C. Hocquet, and F. Regazzoni, "A Fast ULV Logic Synthesis Flow in Many-Vt CMOS Processes for Minimum Energy under Timing Constraints", IEEE Transactions on Circuits and Systems II, vol. 59, issue 12, pp. 947-951, 2013.
Bol, D., C. Hocquet, and F. Regazzoni, "A Fast ULV Logic Synthesis Flow in Many-Vt CMOS Processes for Minimum Energy Under Timing Constraints", IEEE Transactions on Circuits and Systems II: Express Briefs , vol. 59-II, issue 12, pp. 947-951, 02/2012.
E
Ferrante, A., M. Malek, F. Martinelli, F. Mercaldo, and J. Milosevic, "Extinguishing Ransomware - A Hybrid Approach to Android Ransomware Detection", Foundations and Practice of Security, vol. 10723, Cham, Springer International Publishing, pp. 242-258, 02/2018.
Valencia, F., T. Oder, T. Güneysu, and F. Regazzoni, "Exploring the Vulnerability of R-LWE Encryption to Fault Attacks", Workshop on Cryptography and Security in Computing Systems of the HiPEAC2018 Conference, CS2 '18, New York, NY, USA, ACM, 2018.

Pages