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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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C
Barenghi, A., C. Hocquet, D. Bol, F-X. Standaert, F. Regazzoni, and I. Koren, "A Combined Design-Time/Test-Time Study of the Vulnerability of Sub-Threshold Devices to Low Voltage Fault Attacks", IEEE Transactions on Emerging Topics in Computing, vol. PP, issue 99, 04/2014.
Eisenbarth, T., Z. Gong, T. Gneysu, S. Heyse, S. Indesteege, S. Kerckhof, F. Koeune, T. Nad, T. Plos, F. Regazzoni, et al., "Compact Implementation and Performance Evaluation of Block Ciphers in ATtiny Devices", Progress in Cryptology - Africacrypt, Ifrance, Morocco, July, 2012.
Balasch, J., B. Ege, T. Eisenbarth, B. Grard, Z. Gong, T. Gneysu, S. Heyse, S. Kerckhof, F. Koeune, T. Plos, et al., "Compact Implementation and Performance Evaluation of Hash Functions in ATtiny Devices", 11th Smart Card Research and Advanced Application Conference (CARDIS), Graz, Austria, November, 2012.
Fiorin, L., G. Palermo, and C. Silvano, "A Configurable Monitoring Infrastructure for NoC-Based Architectures", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. PP, issue 99, 2013.
Mariani, G., G. Palermo, V. Zaccaria, A. Brankovic, J. Jovic, and C. Silvano, "A Correlation-based Design Space Exploration Methodology for Multi-Processor Systems-on-Chip", Proceedings of DAC 2010: Design Automation Conference, Anheim, CA, USA, pp. 120–125, June, 2010.
Bondi, U., and M. Sami, "Creating an Embedded Systems Program from Scratch: Nine years of experience at ALaRI", Proceedings of the 2009 Workshop on Embedded System Education, Grenoble, France, October, 2009.
Masin, M., F. Palumbo, H. Myrhaug, J. A. de Oliv Filho, M. Pastena, M. Pelcat, L. Raffo, F. Regazzoni, A. A. Sanchez, A. Toffetti, et al., "Cross-layer Design of Reconfigurable Cyber-Physical Systems", Proceedings of Design, Automation and Test in Europe (DATE) 2017, 2017.
D
Fiorin, L., G. Palermo, S. Luković, and C. Silvano, "A Data protection Unit for NoC-based Architecture", CODES+ISSS 2007, in proceedings of the Fifth IEEE/ACM/FIP International Conference of Hardware/Software Codesign and System Synthesis (CODES+ISSS 2007), Salzburg, Austria, September 30, 2007.
Regazzoni, F., A. Cevrero, F-X. Standaert, S. Badel, T. Kluter, P. Brisk, Y. Leblebici, and P. Ienne, "A Design Flow and Evaluation Framework for DPA-resistant Instruction Set Extensions", Cryptographic Hardware and Embedded Systems (CHES), vol. 5747, Lausanne, Switzerland, Springer Berlin Heidelberg, pp. 205-219, September, 2009.
Fiorin, L., L. Micconi, and M. Sami, "Design of Fault Tolerant Network Interfaces for NoCs", Proceedings of 14th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools (DSD'11), Oulu, Finland, September, 2011.
Mariani, G., P. Avasare, C. Ykman-Couvreur, G. Vanmeerbeeck, G. Palermo, C. Silvano, and V. Zaccaria, "Design Space Exploration for Run-Time Management of a Reconfigurable System for Video Streaming", Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, 1: Springer, pp. 189-204, 2011.
Mariani, G., P. Avasare, C. Ykman-Couvreur, G. Vanmeerbeeck, G. Palermo, C. Silvano, and V. Zaccaria, "Design Space Exploration for Run-Time Management of a Reconfigurable System for Video Streaming", Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, 1: Springer, pp. 189-204, 2011.
Mariani, G., G. Palermo, C. Silvano, and V. Zaccaria, "A Design Space Exploration Methodology Supporting Run-Time Resource Management for Multi-Processors System on-Chip", Proceedings IEEE SASP'09 - Symposium on Application Specific Processors, San Francisco, CA, USA, July, 2009.
Mariani, G., P. Avasare, C. Ykman-Couvreur, G. Vanmeerbeeck, G. Palermo, C. Silvano, and V. Zaccaria, "Design Space Exploration of a Reconfigurable System for Supporting Video Streaming Run-time Management", Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, New York, USA, Springer, 2011.
Kavka, C., A. Turco, G. Palermo, C. Silvano, V. Zaccaria, G. Mariani, S. Bocchio, and F. Dongrui, "Design Space Exploration of Parallel Architectures", Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, New York, USA, Springer, 2011.
Avasare, P., C. Ykman-Couvreur, G. Vanmeerbeeck, G. Mariani, G. Palermo, C. Silvano, and V. Zaccaria, "Design Space Exploration Supporting Run-time Resource Management", Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, New York, USA, Springer, 2011.
Mariani, G., G. Palermo, V. Zaccaria, and C. Silvano, "Design-space Exploration and Runtime Resource Management for Multicores", ACM Transactions on Embedded Computing Systems (TECS) - Special issue on application-specific processors, vol. 13, issue 2, pp. 20:1–20:27, 09/2013.
Fornaciari, W., F. Salice, U. Bondi, and E. Magini, "Development cost and size estimation starting from high-level specifications", CODES '01: Proceedings of the ninth international symposium on Hardware/software codesign, Copenhagen, Denmark, ACM Press, New York, USA, pp. 86-91, 2001.
Mariani, G., R. Meeuws, G. Palermo, V-M. Sima, C. Silvano, and K. Bertels, "DRuiD: Designing Reconfigurable Architectures with Decision-making Support", 19th Asia and South Pacific Design Automation Conference (ASP-DAC), Singapore, 01/2014.
Mariani, G., R. Meeuws, G. Palermo, V-M. Sima, C. Silvano, and K. Bertels, "DRuiD: Designing Reconfigurable Architectures with Decision-making Support", 19th Asia and South Pacific Design Automation Conference (ASP-DAC), Singapore, 01/2014.

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