Export 29 results:
Author Title Type [ Year] Filters: First Letter Of Title is A [Clear All Filters]
"Area and Power Efficient Synthesis of DPA-Resistant Cryptographic SBoxes",
International Conference on VLSI Design & Embedded Systems, Bangalore, India, January 6-10, 2007.
"ASIC Hardware Implementation of the IDEA NXT Encryption Algorithm",
IEEE International Symposium on Circuits and Systems, Kos, Greece, May 21-24, 2006.
"Application-Driven Optimization of VLIW Architectures: A Hardware-Software Approach",
RTAS '05: Proceedings of the 11th IEEE Real Time on Embedded Technology and Applications Symposium, Washington, DC, USA, IEEE Computer Society, pp. 128–137, 03/2005.
"Automatic Synthesis of the Hardware/Software Interface in Multiprocessor Architectures",
FDL'05 - Forum on Specification and Design Languages, Lausanne, Switzerland, September 27-30, 2005.
"The ALaRI Intranet: a Remote Collaboration Platform for a Worldwide Learning and Research Network",
World Conference on Educational Multimedia, Hypermedia and Telecommunications 04 (ED-MEDIA 04), Lugano, Switzerland, AACE Press, pp. 5042-5047, 2004.
"An ASIC design for a high speed implementation of the hash function SHA-256 (384, 512)",
GLSVLSI '04: Proceedings of the 14th ACM Great Lakes symposium on VLSI, Boston, MA, USA, ACM Press, New York, USA, pp. 421–425, 2004.
"About the Performances of the Advanced Encryption Standard in Embedded Systems with Cache Memory",
ISCAS 2003, Bangkok, pp. 145-148, May 25-28, 2003.
"An Application Level Synthesis Methodology for Multidimensional Embedded Processing Systems",
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 22, no. 11, pp. 1457-1470, November, 2003.
"An Application Level Synthesis Methodology for Embedded Systems",
ISCAS 2002, Scottsdale, pp. 473-476, May 26-29, 2002.