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] Filters: Author is Francesco Regazzoni [Clear All Filters]
"The design space of the number theoretic transform: A survey",
2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, {SAMOS} 2017, Pythagorion, Greece, July 17-20, 2017 (Invited), 2017.
"Fault Attacks, Injection Techniques and Tools for Simulation",
Hardware Security and Trust: Design and Deployment of Integrated Circuits in a Threatened Environment, First edition; 2016: Springer, pp. 149-167, 2017.
Hardware Security and Trust: Design and Deployment of Integrated Circuits in a Threatened Environment,
, First edition; 2016: Springer, 2017.
"An Investigation of Sources of Randomness Within Discrete Gaussian Sampling",
IACR Cryptology ePrint Archive, vol. 2017, pp. 298, 2017.
"Malware Threats and Solutions for Trustworthy Mobile Systems Design",
Hardware Security and Trust: Design and Deployment of Integrated Circuits in a Threatened Environment, First edition; 2016: Springer, pp. 149-167, 2017.
"Special Session Paper: Efficient Arithmetic for lattice-based Cryptography",
Proceedings of the CODES+ISSS 2017, 2017.
"Adaptable AES implementation with power-gating support",
International Conference on Computing Frontiers CF'16, Como, Italy, ACM Ney York, NY, USA, pp. 331-334, 05/2016.
"Atomic-AES: A Compact Implementation of the AES Encryption/Decryption Core",
Proceedings of 17th International Conference on Cryptology in India (INDOCRYPT) 2016, 2016.
"Evaluating the Impact of Environmental Factors on Physically Unclonable Functions",
International Symposium on Field-Programmable Gate Arrays FPGA 2016, Monterey, CA, USA, ACM New York, NY, USA, pp. 279, 02/2016.
"Instruction Set Extensions for secure applications",
Design, Automation Test in Europe Conference DATE 2016, Dresden, Germany, IEEE, pp. 1529-1534, 03/2016.
"Lattice-based cryptography: From reconfigurable hardware to ASIC",
2016 International Symposium on Integrated Circuits (ISIC): IEEE, 12/2016.
"Physical Attacks and Beyond",
Proceedings of the Selected Areas in Cryptography: 23nd International Conference (SAC) 2016, 2016.
"Round gating for low energy block ciphers",
2016 IEEE International Symposium on Hardware Oriented Security and Trust, HOST, McLean, VA, USA, IEEE Computer Society, pp. 55-60, 05/2016.
"Secure architectures of future emerging cryptography",
International Conference on Computing Frontiers CF'16, Como, italy, ACM New York, pp. 315-322, 05/2016.
"Standard lattices in hardware",
Proceedings of the 53rd Annual Design Automation Conference DAC 2016, Austin, TX, USA, ACM, pp. 162, 06/2016.
"Trojans in Early Design Steps - An Emerging Threat",
TRUDEVICE Final Conference (FCTRUâ16), 2016.
"200 MS/s ADC implemented in a FPGA employing TDCs",
FPGA International Symposium on Field-Programmable Gate Arrays ACM/SIGDA 2015, Monterey, CA, USA, ACM, pp. 228-235, 02/2015.
"Automatic Application of Power Analysis Countermeasures",
IEEE Transactions on Computers , vol. 64, issue 2, pp. 329-341, 02/2015.
"Challenges in designing trustworthy cryptographic co-processors",
IEEE International Symposium on Circuits and Systems (ISCAS) 2015, Lisbon, Portugal, IEEE, pp. 2009-2012, 09/2015.
"Design methodologies for securing cyber-physical systems",
2015 International Conference on Hardware/Software Codesign and System Synthesis CODES+ISSS, Amsterdam, Netherlands, IEEE, pp. 30-36, 10/2015.