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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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A
Alippi, C., A. Galbusera, and M. Stellini, "An Application Level Synthesis Methodology for Embedded Systems", ISCAS 2002, Scottsdale, pp. 473-476, May 26-29, 2002.
Alippi, C., A. Galbusera, and M. Stellini, "An Application Level Synthesis Methodology for Multidimensional Embedded Processing Systems", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 22, no. 11, pp. 1457-1470, November, 2003.
Amaral, J., F. Regazzoni, P. Tomas, and R. Chaves, "Accelerating differential power analysis on heterogeneous systems", The 9th Workshop on Embedded Systems Security (WESS) 2014, New Delhi, India, ACM, 10/2014.
B
Banik, S., A. Bogdanov, T. Fanni, C. Sau, L. Raffo, F. Palumbo, and F. Regazzoni, "Adaptable AES implementation with power-gating support", International Conference on Computing Frontiers CF'16, Como, Italy, ACM Ney York, NY, USA, pp. 331-334, 05/2016.
Banik, S., A. Bogdanov, and F. Regazzoni, "Atomic-AES: A Compact Implementation of the AES Encryption/Decryption Core", Proceedings of 17th International Conference on Cryptology in India (INDOCRYPT) 2016, 2016.
Bayrak, A. Galip, F. Regazzoni, D. Novo Bruna, P. Brisk, F-X. Standaert, and P. Ienne, "Automatic Application of Power Analysis Countermeasures", IEEE Transactions on Computers, vol. PP, issue 99, 12/2013.
Bayrak, A. Galip, F. Regazzoni, D. Novo, P. Brisk, F-X. Standaert, and P. Ienne, "Automatic Application of Power Analysis Countermeasures", IEEE Transactions on Computers , vol. 64, issue 2, pp. 329-341, 02/2015.
Bircan, A., M. Macchetti, G M. Bertoni, L. Breveglieri, V. Zaccaria, and P. Fragneto, "About the Performances of the Advanced Encryption Standard in Embedded Systems with Cache Memory", ISCAS 2003, Bangkok, pp. 145-148, May 25-28, 2003.
Bonesana, I., M. Paolieri, and M D. Santambrogio, "An adaptable FPGA-based System for Regular Expression Matching", Proceedings of Design, Automation and Test in Europe (DATE) Conference, Munich, Germany, March 10-14, 2008.
C
Cannella, E., O. Derin, P. Meloni, G. Tuveri, and T. Stefanov, "Adaptivity Support for MPSoCs based on Process Migration in Polyhedral Process Networks", VLSI Design, vol. 2012, no. Article ID 987209: Hindawi, pp. 15 pages, February, 2012.
Cappiello, C., A. Hinostroza, B. Pernici, M. Sami, E. Henis, R. I. Kat, K. Z. Meth, and M. Mura, "ADSC: Application-Driven Storage Control for Energy Efficiency", Information and Communication on Technology for the Fight against Global Warming - First International Conference ICT-GLOW, vol. 6868, Toulouse, France, Springer, pp. 165-179, 08/2011.
D
Dadda, L., M. Macchetti, and J. Owen, "An ASIC design for a high speed implementation of the hash function SHA-256 (384, 512)", GLSVLSI '04: Proceedings of the 14th ACM Great Lakes symposium on VLSI, Boston, MA, USA, ACM Press, New York, USA, pp. 421–425, 2004.
F
Ferrante, A., G. Piscopo, and S. Scaldaferri, "Application-Driven Optimization of VLIW Architectures: A Hardware-Software Approach", RTAS '05: Proceedings of the 11th IEEE Real Time on Embedded Technology and Applications Symposium, Washington, DC, USA, IEEE Computer Society, pp. 128–137, 03/2005.
Ferrante, A., M. Chelodi, F. Bruschi, and V. Mozzetti, "An Algorithm for Extended Dynamic Range Video in Embedded Systems", SENSORNETS 2013 - 2nd International Conference on Sensor Networks, Barcelona, Spain, INSTICC, 02/2013.
G
Gamrat, C., J-M. Philippe, C. Jesshope, A. Shafarenko, L. Bisdounis, U. Bondi, A. Ferrante, J. Cabestany, M. Huebner, J. Parsinnen, et al., "AETHER: Self-Adaptive Networked Entities: Autonomous Computing Elements for Future Pervasive Applications and Technologies", Reconfigurable Computing: From FPGAs to Hardware/Software Codesign, New York, USA, Springer, pp. 149–184, 2011.
Giaconia, M., M. Macchetti, F. Regazzoni, and K. Schramm, "Area and Power Efficient Synthesis of DPA-Resistant Cryptographic SBoxes", International Conference on VLSI Design & Embedded Systems, Bangalore, India, January 6-10, 2007.
K
Kaitović, I., and S. Luković, "Adoption of Model-Driven methodology to aggregations design in Power Grid", INDIN '11: Proceedings of the 9th IEEE International Conference on Industrial Informatics, Caparica, Lisbon, Portugal, pp. 1–6, July 26-29, 2011.
Kozma, R., C. Alippi, Y. Choe, and F. Morabito, "Artificial Intelligence in the Age of Neural Networks and Brain Computing", Academic Press , 1, pp. 420, 2018.
L
Luković, S., and L. Fiorin, "An Automated Design Flow for NoC-based MPSoCs on FPGA", RSP 2008, The 19th IEEE/IFIP International Symposium on Rapid System Prototyping, Monterey, USA/CA, June 2-5, 2008.
Luković, S., "Adapting Multi-Agent Systems Approach for Integration of Prosumers in Smart Grids", Proceedings of the IEEE Eurocon 2013, July, 2013.

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