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"A 640 Mbit/s 32-bit Pipelined Implementation of the AES Algorithm", SECRYPT, Porto, Portugal, July 26, 2008.
"About the Performances of the Advanced Encryption Standard in Embedded Systems with Cache Memory", ISCAS 2003, Bangkok, pp. 145-148, May 25-28, 2003.
"Efficient C implementation of the ECC and AES cryptographic systems", Technology Leadership Day - organized by the MicroSwiss Network, Fribourg, October 10, 2001.
"Efficient Software Implementation of AES on 32-Bit Platforms", CHES '02: Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems, London, UK, Springer-Verlag, pp. 159–171, 2003.
"Hardware Implementation of the Rijndael Sbox: a Case Study", ST Journal of System Research, pp. 84-91, July, 2003.
Method and circuit for data encryption/decryption, , no. US 09/974,705, April, 2003.
Method of implementing one-to-one binary function and relative hardware device, especially for a Rijndael S-box, , no. US 10/816,791 -- EP 20030425211, 10/2004.
"Speeding Up AES By Extending a 32 bit Processor Instruction Set", ASAP '06: Proceedings of the IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06), Washington, DC, USA, IEEE Computer Society, pp. 275-282, 2006.