@article {18591,
	title = {Black-Hat High-Level Synthesis: Myth or Reality?},
	journal = {IEEE Transactions on Very Large Scale Integration Systems},
	year = {In Press},
	doi = {10.1109/TVLSI.2018.2884742},
	author = {Pilato, Christian and Basu, Kanad and Regazzoni, Francesco and Karri, Ramesh}
}
@article {18570,
	title = {On Practical Discrete Gaussian Samplers For Lattice-Based Cryptography},
	journal = {IEEE Transaction on Computers},
	year = {In Press},
	author = {Howe, James and Khalid, Ayesha and Rafferty, Ciara and Regazzoni, Francesco and O{\textquoteright}Neill, Maire}
}
@article {18552,
	title = {TaintHLS: High-Level Synthesis For Dynamic Information Flow Tracking},
	journal = {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
	year = {In Press},
	doi = {10.1109/TCAD.2018.2834421},
	author = {Pilato, Christian and Garg, Siddharth and Wu, Kaijie and Karri, Ramesh and Regazzoni, Francesco}
}
@conference {18590,
	title = {High-Level Synthesis of Benevolent Trojans},
	booktitle = {Proceedings of the IEEE Design, Automation and Test in Europe Conference (DATE)},
	year = {2019},
	author = {Pilato, Christian and Basu, Kanad and Shayan, Mohammed and Regazzoni, Francesco and Karri, Ramesh}
}
@book {18544,
	title = {Artificial Intelligence in the Age of Neural Networks and Brain Computing},
	series = {Academic Press },
	year = {2018},
	pages = {420},
	edition = {1},
	abstract = {Artificial Intelligence in the Age of Neural Networks and Brain Computing demonstrates that existing disruptive implications and applications of AI is a development of the unique attributes of neural networks, mainly machine learning, distributed architectures, massive parallel processing, black-box inference, intrinsic nonlinearity and smart autonomous search engines. The book covers the major basic ideas of brain-like computing behind AI, provides a framework to deep learning, and launches novel and intriguing paradigms as future alternatives. The success of AI-based commercial products proposed by top industry leaders, such as Google, IBM, Microsoft, Intel and Amazon can be interpreted using this book. },
	author = {Kozma, Robert and Alippi, Cesare and Choe, Yoonsuck and Morabito, Francesco}
}
@conference {18573,
	title = {Compact, Scalable, and Efficient Gaussian Samplers for Lattice-Based Cryptography},
	booktitle = {Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS) 2018},
	year = {2018},
	author = {Khalid, Ayesha and Howe, James and Rafferty, Ciara and Regazzoni, Francesco and O{\textquoteright}Neil, Maire}
}
@article {18566,
	title = {Impact of Failure Prediction on Availability: Modeling and Comparative Analysis of Predictive and Reactive Methods},
	journal = {IEEE Transactions on Dependable and Secure Computing},
	year = {2018},
	pages = {1-1},
	abstract = {Predicting failures and acting proactively have a potential to improve availability as a correct prediction and a successful mitigation may bring a reward resulting in decrease of downtime and availability improvement. But, conversely, each incorrect prediction may introduce additional downtime (penalty). Therefore, depending on the quality of prediction and the system parameters, predictive fault-tolerance methods may improve or may degrade availability in comparison to the reactive ones. We first derive taxonomies of fault-tolerant techniques and policies to differentiate between reactive and proactive policies that are further classified as systematic and predictive. To evaluate whether a predictive policy improves availability or not, we derive an analytical model for availability quantification. We use Markov chains to extend steady-state availability equation to include: precision and recall, penalty and reward, mitigation success probability and potential failure rate increase due to the prediction load. We also derive A-measure to optimize failure prediction for increasing availability. In our conclusion, precision and recall have comparable impact on availability as changing MTTF and MTTR. To validate the model we also simulate and analyze availability of a virtualized server with exponential distribution of failure and repair rates.},
	keywords = {Analytical models, availability, Computational modeling, failure, fault tolerance, Fault tolerant systems, Mathematical model, modeling, Optimization, prediction, predictive, Predictive models, proactive, Servers},
	issn = {1545-5971},
	doi = {10.1109/TDSC.2018.2806448},
	author = {Kaitovi{\'c}, Igor and Malek, Miroslaw}
}
@article {18554,
	title = {Securing Hardware Accelerators: a New Challenge for High-Level Synthesis},
	journal = {IEEE Embedded Systems Letters},
	volume = {3},
	issue = {10},
	year = {2018},
	month = {11/2017},
	pages = {77-80},
	chapter = {77},
	doi = {10.1109/LES.2017.2774800},
	author = {Pilato, Christian and Garg, Siddharth and Karri, Ramesh and Regazzoni, Francesco}
}
@conference {18555,
	title = {TAO: Techniques for Algorithmic Obscuration during High-Level Synthesis},
	booktitle = {Proceedings of the ACM/IEEE Design Automation Conference (DAC)},
	year = {2018},
	doi = {10.1145/3195970.3196126},
	author = {Pilato, Christian and Regazzoni, Francesco and Karri, Ramesh and Garg, Siddharth}
}
@conference {18560,
	title = {The design space of the number theoretic transform: {A} survey},
	booktitle = {2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, {SAMOS} 2017, Pythagorion, Greece, July 17-20, 2017 (Invited)},
	year = {2017},
	doi = {10.1109/SAMOS.2017.8344640},
	url = {https://doi.org/10.1109/SAMOS.2017.8344640},
	author = {Valencia, Felipe and Khalid, Ayesha and O{\textquoteright}Sullivan, Elizabeth and Regazzoni, Francesco}
}
@conference {18541,
	title = {Learning in Nonstationary Environments: A Hybrid Approach},
	booktitle = {Artificial Intelligence and Soft Computing},
	year = {2017},
	publisher = {Springer International Publishing},
	organization = {Springer International Publishing},
	address = {Cham},
	abstract = {Solutions present in the literature to learn in nonstationary environments can be grouped into two main families: passive and active. Passive solutions rely on a continuous adaptation of the envisaged learning system, while the active ones trigger the adaptation only when needed. Passive and active solutions are somehow complementary and one should be preferred than the other depending on the nonstationarity rate and the tolerable computational complexity. The aim of this paper is to introduce a novel hybrid approach that jointly uses an adaptation mechanism (as in passive solutions) and a change detection triggering the need to retrain the learning system (as in active solutions).},
	isbn = {978-3-319-59060-8},
	author = {Alippi, Cesare and Qi, Wen and Roveri, Manuel},
	editor = {Rutkowski, Leszek and Korytkowski, Marcin and Scherer, Rafa{\l} and Tadeusiewicz, Ryszard and Zadeh, Lotfi A. and Zurada, Jacek M.}
}
@article {18455,
	title = {A Framework for Disturbance Analysis in Smart Grids by Fault Injection},
	journal = {Springer Journal on "Computer Science - Research and Development"},
	year = {2016},
	month = {09/2016},
	abstract = {With growing complexity of electric power systems, a total number of disturbances is expected to increase. Analyzing these disturbances and understanding grid{\textquoteright}s behavior, when under a disturbance, is a pre-requisite for designing methods for boosting grid{\textquoteright}s stability. The main obstacle to the analysis is a lack of relevant data that are publicly available. In this paper, we design and implement a framework for emulation of grid disturbances by employing simula-tion and fault-injection techniques. We also present a case study on generating voltage sag related data. A foreseen usage of the framework considers mainly prototyping, root-cause analysis and design and comparison of methods for disturbance detection and prediction. },
	issn = {1865-2042},
	doi = {10.1007/s00450-016-0313-8},
	url = {http://dx.doi.org/10.1007/s00450-016-0313-8},
	author = {Kaitovi{\'c}, Igor and Obradovi{\'c}, Filip and Lukovi{\'c}, Slobodan and Malek, Miroslaw}
}
@conference {18562,
	title = {Lattice-based cryptography: From reconfigurable hardware to {ASIC}},
	booktitle = {2016 International Symposium on Integrated Circuits (ISIC)},
	year = {2016},
	month = {12/2016},
	publisher = {IEEE},
	organization = {IEEE},
	doi = {10.1109/isicir.2016.7829689},
	url = {https://doi.org/10.1109/isicir.2016.7829689},
	author = {Oder, Tobias and G{\"u}neysu, Tim and Valencia, Felipe and Khalid, Ayesha and O{\textquoteright}Neill, Maire and Regazzoni, Francesco}
}
@conference {18503,
	title = {A Methodology for Proactive Maintenance of Uninterruptible Power Supplies},
	booktitle = {Latin-American Symposium on Dependable Computing  (LADC2016) - Workshop on Dependability in Evolving Systems (WDES)},
	year = {2016},
	month = {10/2016},
	address = {Cali, Colombia},
	abstract = {We propose a methodology for proactive maintenance of Uninterruptible Power Supply (UPS) devices based on online health-status monitoring and application of data analytics for prediction of UPS components{\textquoteright} failures. The goals of the work are (i) improvement of reliability of UPS devices by ensuring prompt action prior to a failure of a component, and (ii) provision of more cost-effective maintenance by servicing the device only when required instead of periodically. Improving reliability of UPS{\textquoteright}es also enhances dependability of critical infrastructures that require high quality power supply.},
	author = {Lukovi{\'c}, Slobodan and Kaitovi{\'c}, Igor and Lecuona, Gerardo and Malek, Miroslaw}
}
@conference {18454,
	title = {Optimizing Failure Prediction to Maximize Availability},
	booktitle = {13th IEEE International Conference on Autonomic Computing (ICAC)},
	year = {2016},
	month = {07/2016},
	address = {W{\"u}rzburg, Germany},
	abstract = {Availability of autonomous systems can be enhanced with self-monitoring and fault-tolerance methods based on failures prediction. With each correct prediction, proactive actions may be taken to prevent or to mitigate a failure. On the other hand, incorrect predictions will introduce additional downtime associated with the overhead of a proactive action that may decrease availability. The total effect on availability will depend on the quality of prediction (measured with precision and recall), the overhead of proactive actions (penalty), and the benefit of proactive actions when prediction is correct (reward). In this paper, we quantify the impact of failure prediction and proactive actions on steady-state availability. Furthermore, we provide guidelines for optimizing failure prediction to maximize availability by selecting a proper precision and recall trade-off with respect to penalty and reward. A case study to demonstrate the approach is also presented.},
	author = {Kaitovi{\'c}, Igor and Malek, Miroslaw}
}
@conference {18489,
	title = {Secure architectures of future emerging cryptography},
	booktitle = {International Conference on Computing Frontiers CF{\textquoteright}16},
	series = {Proceedings of the ACM International Conference on Computing Frontiers},
	year = {2016},
	month = {05/2016},
	pages = {315-322},
	publisher = {ACM New York},
	organization = {ACM New York},
	address = {Como, italy},
	abstract = {Funded under the European Union{\textquoteright}s Horizon 2020 research and innovation programme, SAFEcrypto will provide a new generation of practical, robust and physically secure post-quantum cryptographic solutions that ensure long-term security for future ICT systems, services and applications. The project will focus on the remarkably versatile field of Lattice-based cryptography as the source of computational hardness, and will deliver optimised public key security primitives for digital signatures and authentication, as well identity based encryption (IBE) and attribute based encryption (ABE). This will involve algorithmic and design optimisations, and implementations of lattice-based cryptographic schemes addressing cost, energy consumption, performance and physical robustness. As the National Institute of Standards and Technology (NIST) prepares for the transition to a post-quantum cryptographic suite B, urging organisations that build systems and infrastructures that require long-term security to consider this transition in architectural designs; the SAFEcrypto project will provide Proof-of-concept demonstrators of schemes for three practical real-world case studies with long-term security requirements, in the application areas of satellite communications, network security and cloud. The goal is to affirm Lattice-based cryptography as an effective replacement for traditional number-theoretic public-key cryptography, by demonstrating that it can address the needs of resource-constrained embedded applications, such as mobile and battery-operated devices, and of real-time high performance applications for cloud and network management infrastructures},
	keywords = {identity based encryption, lattice-based cryptography, physical attacks, public-key cryptography},
	isbn = {978-1-4503-4128-8},
	doi = {10.1145/2903150.2907756},
	url = {http://doi.acm.org/10.1145/2903150.2907756},
	author = {O{\textquoteright}Neill, Maire and O{\textquoteright}Sullivan, Elizabeth and McWilliams, Gavin and Saarinen, Markku-Juhani and Moore, Ciara and Khalid, Ayesha and Howe, James and Del Pino, Rafael and Abdalla, Michel and Regazzoni, Francesco and Valencia, Andres Felipe and G{\"u}neysu, Tim and Oder, Tobias and Waller, Adrian and Jones, Glyn and Barnett, Anthony and Griffin, Robert and Byrne, Andrew and Ammar, Bassem and Lund, David}
}
@conference {18379,
	title = {Proactive Failure Management in Smart Grids for Improved Resilience (A Methodology for Failure Prediction and Mitigation)},
	booktitle = {IEEE GLOBECOM SmartGrid Resilience (SGR) Workshop},
	year = {2015},
	month = {12/2015},
	address = {San Diego, CA, USA},
	abstract = {A gradual move in the electric power industry towards Smart Grids brings several challenges to the system operation such as preserving its resilience and ensuring security. As the system complexity grows and a number of failures increases, the need for grid management paradigm shift from reactive to proactive is apparent and can be realized by employing advanced monitoring instruments, data analytics and prediction methods. In order to improve resilience of the Smart Grid and to contribute to efficient system operation, we present a blueprint of a comprehensive methodology for proactive failure management that may also be applied to manage other types of disturbances and undesirable changes. The methodology is composed of three main steps: (i) continuous monitoring of the most indicative features, (ii) prediction of failures and (iii) their mitigation. The approach is complementary to the existing ones that are mainly based on fast detection and localization of grid disturbances, and reactive corrective actions.},
	keywords = {Failure Prediction, Proactive Management, Resilience, security, smart grid, Synchrophasor},
	author = {Kaitovi{\'c}, Igor and Lukovi{\'c}, Slobodan and Malek, Miroslaw}
}
@conference {18360,
	title = {Simulation and Analysis of Negative-Bias Temperature Instability Aging on Power Analysis Attacks},
	booktitle = {IEEE Int. Symposium on Hardware-Oriented Security and Trust},
	year = {2015},
	month = {05/2015},
	address = {McLean, VA, USA},
	author = {Guo, Xiaofei and Karimi, Nagmeh and Regazzoni, Francesco and Jin, Chenglu and Karri, Ramesh}
}
@conference {18378,
	title = {Unifying Dependability of Critical Infrastructures: Electric Power System and ICT (Concepts, Figures of Merit and Taxonomy)},
	booktitle = {IEEE Pacific Rim International Symposium on Dependable Computing (PRDC)},
	year = {2015},
	month = {11/2015},
	address = {Zhangjiajie, China},
	abstract = {With Smart Grids efficiency of the electric power delivery service can be significantly increased by using advanced ICT infrastructure. The looming danger of merging two critical infrastructures, ICT and electric power, is that dependability may be compromised due to interdependencies and different approaches to dependability in the two communities. This calls for a unified approach to dependability which may be achieved by viewing Smart Grids as cyber-physical systems. We analyze and compare definitions and figures of merit used in ICT and electric power systems{\textquoteright} communities to provide the basis for dependability analysis of Smart Grids. We propose a taxonomy of faults for Smart Grids by examining a large set of previous power system outages. Our work relies on the analysis of relevant events from the past in an attempt to understand present dependability state of Smart Grids and pave the way for proactive grid management.},
	keywords = {Critical Infrastructures, Cyber-Physical, Dependability, Fault Taxonomy, smart grid},
	author = {Kaitovi{\'c}, Igor and Lukovi{\'c}, Slobodan and Malek, Miroslaw}
}
@article {18058,
	title = {A Combined Design-Time/Test-Time Study of the Vulnerability of Sub-Threshold Devices to Low Voltage Fault Attacks},
	journal = {IEEE Transactions on Emerging Topics in Computing},
	volume = {PP},
	issue = {99},
	year = {2014},
	month = {04/2014},
	abstract = {The continuous scaling of VLSI technology and the possibility to run circuits in subthreshold voltage range make it possible to implement standard cryptographic primitives within the very limited circuit and power budget of RFID devices. However, such cryptographic implementations raise concerns regarding their vulnerability to both active and passive side-channel attacks. In particular, when focusing on RFID targeted designs, it is important to evaluate their resistance against low cost physical attacks. A low cost fault injection attack can be mounted, for example, by lowering the supply voltage of the chip with the goal of causing setup time violations. In this paper, we provide an in-depth characterization of a chip implementation of the AES cipher. The chip has been designed using a 65nm low power standard cell library and operates in a subthreshold voltage range. We first show that it is possible to inject faults (through lowering the supply voltage) compliant with the fault models required to perform attacks against the AES cipher. We then investigate the possibility of predicting, at design time, which parts of the chip are more likely to be sensitive to such fault injection attacks and produce the desirable (from the point of view of the attacker) faulty behavior. Identifying such sensitive logic signals allows us to suggest to the designer a tailored countermeasure strategy for thwarting these attacks, with a minimal impact on the circuit{\textquoteright}s performance.},
	issn = {2168-6750},
	doi = {10.1109/TETC.2014.2316509},
	author = {Barenghi, Alessandro and Hocquet, C{\'e}dric and Bol, David and Standaert, Fran{\c c}ois-Xavier and Regazzoni, Francesco and Koren, Israel}
}
@conference {18233,
	title = {Modeling Requirements For Security-enhanced Design of Embedded Systems},
	booktitle = {ICETE SECRYPT},
	year = {2014},
	month = {08/2014},
	publisher = {ICETE},
	organization = {ICETE},
	address = {Vienna, Austria},
	author = {Ferrante, Alberto and Kaitovi{\'c}, Igor and Milosevic, Jelena}
}
@inbook {18024,
	title = {Modeling Responsiveness of Decentralized Service Discovery in Wireless Mesh Networks},
	booktitle = {MMB \& DFT},
	series = {Lecture Notes in Computer Science},
	volume = {8376},
	year = {2014},
	pages = {88-102},
	publisher = {Springer International Publishing Switzerland},
	organization = {Springer International Publishing Switzerland},
	abstract = {In modern service networks, discovery plays a crucial role as a layer where providing instances of a given service can be published and enumerated. Since successful discovery is mandatory for service usage, comprehensive service dependability assessment needs to incorporate the dependability of the discovery layer. This work focuses on the responsiveness of the discovery layer, the probability to operate successfully within a deadline, even in the presence of faults. It proposes a hierarchy of stochastic models for decentralized discovery and uses it to describe the discovery of a single service using three well-known discovery protocols: domain name system based service discovery (DNS-SD), simple service discovery protocol (SSDP) and service location protocol (SLP). Further, a methodology to use the model hierarchy in wireless mesh networks is introduced. Given a pair service requester and provider, a discovery protocol and a deadline, it estimates packet loss probabilities and transmission time distributions for each link on the communication paths between the pair, generates specific model instances and calculates the expected responsiveness. Finally, the paper introduces a new metric, the expected responsiveness distance d_er to estimate the maximum distance from a provider where requesters are still able to discover it with a required responsiveness. The models and their methodology are demonstrated using monitoring data from the distributed embedded systems (DES) testbed at Freie Universit{\"a}t Berlin. It is shown how the responsiveness and d_er of the protocols change depending on the position of requester and provider and the overall link quality in the network.},
	keywords = {fault tolerance, Markov Models, Real time systems, Responsiveness, Service Discovery, Wireless mesh networks},
	isbn = {978-3-319-05358-5},
	issn = {0302-9743},
	doi = {10.1007/978-3-319-05359-2_7},
	url = {http://andreas-dittrich.eu/2013/12/modeling-responsiveness-of-decentralized-service-discovery-in-wireless-mesh-networks},
	author = {Dittrich, Andreas and Lichtblau, Bj{\"o}rn and Rezende, Rafael and Malek, Miroslaw},
	editor = {Fischbach, K. and Krieger, U. R.}
}
@inbook {18065,
	title = {Security IPs and IP Security with FPGAs},
	booktitle = {Secure Smart Embedded Devices Platform and Applications},
	year = {2014},
	author = {Durvaux, Fran{\c c}ois and Kerckhof, St{\'e}phanie and Regazzoni, Francesco and Standaert, Fran{\c c}ois-Xavier},
	editor = {Markantonakis, Konstantinos}
}
@conference {18251,
	title = {Smart Charging Cell for Smart Cities},
	booktitle = {The 2nd IEEE International Workshop on Intelligent Energy Systems (IWIES) },
	year = {2014},
	month = {08/2014},
	abstract = {Energy consumption can be to some extent steered not only in time but in special cases in space as well. This mostly concerns electric vehicles (EV) charging. In this work we present conceptual solution of a {\textquoteleft}GeoGreen Cell{\textquoteright} developed in scope of an international project {\textendash} Ge(o)Green. The main purpose of such an aggregation is to efficiently coordinate. EV charging with respect to price of energy both in time and space. Even though massive acceptance of EVs seems far, there is an emerging need for conceptual solutions and reference models of solutions for their seamless integration into energy system in particular in urban areas. In fact, system level models of the supporting ICT architecture, including structural and behavioral ones, have been
developed. The models have been verified by means of simulations to assure their correctness. Scheduling optimization algorithms have been created and the system has been validated by means of system-level simulations.},
	keywords = {aggregation, EV charging, structural and behavioral models, SyML},
	author = {Lukovi{\'c}, Slobodan and Kaitovi{\'c}, Igor}
}
@conference {17770,
	title = {Adapting Multi-Agent Systems Approach for Integration of Prosumers in Smart Grids},
	booktitle = {Proceedings of the IEEE Eurocon 2013},
	year = {2013},
	month = {July},
	abstract = {Massive deployment of distributed energy resources, predominately renewable, is expected to be a general trend in the near future. Integration of such elements in distribution grid represents one of key challenges that Smart Grids will have to face with. In this work we aim at bridging
industrial and academic views on future trends in this field. We list main issues to be tackled and we propose a conceptual system-level solution based on Multi-Agent Systems. We show basic functionalities and structure for supporting ICT architecture.},
	author = {Lukovi{\'c}, Slobodan},
	editor = {Kovac, Boksov}
}
@conference {17729,
	title = {A Model for the Evaluation of User-Perceived Service Properties},
	booktitle = {International Symposium on Parallel Distributed Processing, Workshops and Phd Forum (IPDPSW)},
	year = {2013},
	month = {May},
	publisher = {IEEE Computer Society},
	organization = {IEEE Computer Society},
	address = {Boston, Massachusetts, USA},
	abstract = {An ever-increasing number of both functional and non-functional requirements has resulted in growing system complexity which demands new solutions in system modeling and evaluation. As a remedy, service-oriented architecture (SOA) offers services as basic building elements of system design. Service dependability is highly dependent on the properties of the underlying information and communications technology (ICT) infrastructure. This is especially true for the user-perceived dependability of a specific pair service client and provider as every pair may utilize different ICT components. We provide a model for the description of ICT components and their non-functional properties based on the Unified Modeling Language (UML). Given a service description, a network topology model and a pair service client and provider, we propose a methodology to automatically identify relevant ICT components and generate a user-perceived service infrastructure model (UPSIM). We demonstrate the feasibility of the methodology by applying it to parts of the service network infrastructure at Universit{\`a} della Svizzera italiana, Switzerland. We then show how this methodology can be used to facilitate user-perceived service dependability analysis.},
	keywords = {availability, design engineering, metamodeling, modeling, object oriented modeling, quality of service (QoS), service dependability, service network management, service networks},
	isbn = {978-0-7695-4979-8},
	doi = {10.1109/IPDPSW.2013.163},
	url = {http://andreas-dittrich.eu/2013/03/a-model-for-the-evaluation-of-user-perceived-service-properties},
	author = {Dittrich, Andreas and Kaitovi{\'c}, Igor and Murillo, Cristina and Rezende, Rafael}
}
@inbook {17996,
	title = {Self-Organizing Real-Time Services in Mobile Ad Hoc Networks},
	booktitle = {Self-Organization in Embedded Real-Time Systems},
	year = {2013},
	pages = {55-74},
	publisher = {Springer New York},
	organization = {Springer New York},
	isbn = {978-1-4614-1968-6},
	doi = {10.1007/978-1-4614-1969-3_3},
	url = {http://dx.doi.org/10.1007/978-1-4614-1969-3_3},
	author = {Kakuda, Yoshiaki and Ohta, Tomoyuki and Malek, Miroslaw},
	editor = {Higuera-Toledano, Teresa and Brinkschulte, Uwe and Rettberg, Achim}
}
@conference {18039,
	title = {Smart Building Integration in Smart Grids},
	booktitle = {The 44th Heating Ventilation Air Condition and Refrigeration Congress and Exhibition - KGH 2013},
	year = {2013},
	abstract = {Modern power distribution systems gradually evolve into Smart Grids. Intelligence is getting inserted in all segments of the grid, monitoring and controlling entire power flow from generation and distribution down to consumption of home appliances. On the other hand renewable generation systems are getting widely deployed in public and residential buildings turning them into prosumers. Such scenario requires novel solutions for smart coupling of generation and consumption. Different kinds of prosumers clustering have been proposed by scientific community as a response. In the present work we propose an ICT structure capable of tackling this challenge. The conceptual solution represents an architecture which enables seamless integration of Smart Buildings into Smart Grids.},
	keywords = {Clustering, smart grid, smart home, System Level Model},
	author = {Lukovi{\'c}, Slobodan and {\v C}ongradac, Velimir and Kuli{\'c}, Filip}
}
@conference {18054,
	title = {STRATOS: open System for TRAcTOrs{\textquoteright} autonomous OperationS},
	booktitle = {EFITA Internation Conference on Sustainable Agriculture through ICT Innovation },
	year = {2013},
	month = {06/2013},
	publisher = {European Federation for Information Technology in Agriculture, Food and the Environment},
	organization = {European Federation for Information Technology in Agriculture, Food and the Environment},
	address = {Torino, Italy},
	abstract = {This paper describes the objectives and final results of the STRATOS project (System for TRAcTOrs{\textquoteright} autonomous OperationS), within the framework of ICT-AGRI ERA-NET (Coordination of European Research within ICT and Robotics in Agriculture and related Environmental Issues). The main objective of the STRATOS project was the development of an open ICT hardware-software infrastructure enabling the acquisition of geo-referenced information on soil and terrain parameters. In more detail, STRATOS project target was to develop and demonstrate new functions enabled by ISOBUS technology (ISO 11783) that support a substantial improvement of the quality of the farming jobs. In particular the idea is to develop a technology based on ISOBUS compliant, wireless self-powered sensor network for the real time measurement of soil and harvester conditions. In this way, Task Controller (an ICT component defined by ISOBUS specification which supervises actively the farming job performed by the tractor) can optimize the whole tractor and implement operational modes to improve the farming job quality and safety of the overall systems. The project lasted from 1st April, 2011 to31st March, 2013, and this paper reports about the project achievements.},
	keywords = {agriculture, ICT, model-driven approach, precision farming, Safety},
	author = {Fantuzzi, Cesare and Gutman, Per-Olof and Kaitovi{\'c}, Igor and Larcher, Luca and Marzani, Stefano and Ruggeri, Massimiliano and Zagurskis, Valerijs}
}
@inbook {18089,
	title = {Systems Engineering for Assessment of Virtual Power System Implementations},
	booktitle = {Artificial Intelligence Applications and Innovations},
	series = {9th IFIP WG 12.5 International Conference, AIAI 2013, Paphos, Cyprus, September 30 {\textendash} October 2, 2013, Proceedings},
	volume = {412},
	year = {2013},
	pages = {667-676},
	publisher = {Springer Berlin Heidelberg},
	organization = {Springer Berlin Heidelberg},
	abstract = {In this work we present an adoption of systems engineering methodology for design and assessment of a Virtual Power System (VPS). The VPS has been defined as an aggregation of distributed energy resources, consumers and storages which can operate autonomously, and is presented to the power system as a single unit in technical and commercial terms. The complexity of these critical systems is tackled by means of systems engineering. We have applied our approach in scope of a research project AlpEnergy.},
	keywords = {assessment, modeling, SysML, systems engineering, VPS},
	isbn = {978-3-642-41141-0},
	issn = {1868-4238},
	doi = {10.1007/978-3-642-41142-7_67},
	author = {Lukovi{\'c}, Slobodan and Kaitovi{\'c}, Igor}
}
@conference {18075,
	title = {Compact Implementation and Performance Evaluation of Block Ciphers in ATtiny Devices},
	booktitle = {Progress in Cryptology - Africacrypt},
	year = {2012},
	month = {July},
	address = {Ifrance, Morocco},
	author = {Eisenbarth, Thomas and Gong, Zheng and Gneysu, Tim and Heyse, Stefan and Indesteege, Sebastiaan and Kerckhof, St{\'e}phanie and Koeune, Francois and Nad, Tomislav and Plos, Thomas and Regazzoni, Francesco and Standaert, Fran{\c c}ois-Xavier and Oldenzeel, Loic Van Oldene}
}
@conference {18073,
	title = {Compact Implementation and Performance Evaluation of Hash Functions in ATtiny Devices},
	booktitle = {11th Smart Card Research and Advanced Application Conference (CARDIS)},
	year = {2012},
	month = {November},
	address = {Graz, Austria},
	author = {Balasch, Josep and Ege, Baris and Eisenbarth, Thomas and Grard, Benot and Gong, Zheng and Gneysu, Tim and Heyse, Stefan and Kerckhof, St{\'e}phanie and Koeune, Francois and Plos, Thomas and Poppelmann, Thomas and Regazzoni, Francesco and Standaert, Fran{\c c}ois-Xavier and Van Assche, Gilles and Van Keer, Ronny and Oldenzeel, Loic Van Oldene and von Maurich, Ingo}
}
@inbook {18062,
	title = {Interaction between Fault Attack Countermeasures and the Resistance against Power Analysis Attacks},
	booktitle = {Fault Analysis in Cryptography},
	series = {Information Security and Cryptography Series, Springer},
	year = {2012},
	pages = {257-272},
	publisher = {Springer Berlin Heidelberg},
	organization = {Springer Berlin Heidelberg},
	abstract = {Most of the countermeasures against fault attacks on cryptographic systems that have been developed so far are based on the addition of information redundancy. While these countermeasures have been evaluated with respect to their cost (implementation overhead) and efficiency (fault coverage), little attention has been devoted to the question of the impact their use has on the effectiveness of other types of side-channel attacks, in particular, power analysis attacks. This chapter presents an experimental study whose goal is to determine whether the added information redundancy can increase the vulnerability of a cryptographic circuit to power analysis attacks.},
	isbn = {978-3-642-29656-7},
	doi = {10.1007/978-3-642-29656-7_15},
	author = {Regazzoni, Francesco and Breveglieri, Luca and Ienne, Paolo and Koren, Israel},
	editor = {Joye, Marc and Tunstall, Michael}
}
@conference {17732,
	title = {Model-driven approach to design ICT infrastructure for precision farming},
	booktitle = {17th IEEE Conference on Emerging Technologies and Factory Automation (ETFA)},
	year = {2012},
	month = {09/2012},
	publisher = {IEEE Industrial Electronics Society},
	organization = {IEEE Industrial Electronics Society},
	address = {Krak{\'o}w, Poland},
	abstract = {Design of complex systems involving a number of experts from various fields necessarily includes modeling at different levels of abstraction. Modeling is particularly important in the initial phase of a joint project when all system requirements and constraints have to be clearly defined and understood by all the partners. Once an unambiguous structural model has been achieved and components interfaces fixed, design of components can be done independently. For the initial phase, a very simplified modeling methodology based on UML that can be easily understood and applied has been proposed. The application of the methodology has been presented through the design of full structural model of the infrastructure for precision farming. Modeled infrastructure is an open ICT hardware-software solution based on ISOBUS specification, that enables partial automation of tractors increasing safety and production efficiency. Model achieved through several steps presents a mutual understanding platform between the partners. Most importantly, a precise model has been achieved without the necessity of in deep study of UML by all the partners.},
	keywords = {agriculture, ICT infrastructure Design, ISOBUS, model-driven approach, precision farming, Safety, Unified Modeling Language},
	isbn = {978-1-4673-4736-5},
	doi = {10.1109/ETFA.2012.6489709},
	author = {Kaitovi{\'c}, Igor and Rezende, Rafael and Murillo, Cristina and Fantuzzi, Cesare}
}
@conference {18140,
	title = {STRATOS: Open System For Tractors{\textquoteright} Autonomous Operations},
	booktitle = {5th International Conference on Automation Technology for Off-road Equipment (ATOE)},
	year = {2012},
	month = {07/2012},
	pages = {162-187},
	publisher = {International Commission of Agricultural and Biosystems Engineering (CIGR)},
	organization = {International Commission of Agricultural and Biosystems Engineering (CIGR)},
	address = {Valencia, Spain},
	abstract = {This paper describes the objectives and preliminary results of the STRATOS project (System for TRAcTOrs{\textquoteright} autonomous OperationS), within the framework of ICT-AGRI ERA-NET (Coordination of European Research within ICT and Robotics in Agriculture and related Environmental Issues). The main objective of the STRATOS project is to develop an open ICT hardware-software infrastructure enabling the partial automation of tractors and at the same time enhancing their operational safety and production efficiency, with the positive effects of reduced accident risk and environmental impact. In more detail, STRATOS project target is to develop and demonstrate new functions enabled by ISOBUS technology (ISO 11783) that support a substantial improvement of the quality of the farming jobs. In particular the idea is to develop a technology based on ISOBUS compliant, wireless self-powered sensor network for the real time measurement of soil and harvester conditions. In this way, Task Controller (an ICT component defined by ISOBUS specification which supervises actively the farming job performed by the tractor) can optimize the whole tractor and implement operational modes to improve the farming job quality and safety of the overall systems. The project started on 1 st April, 2011, and will end the 31 st March, 2013, This paper reports about some achievement gained so far.},
	keywords = {agriculture, ICT infrastructure Design, model-driven approach, precision farming, Safety},
	isbn = {84-615-9654-4},
	author = {Fantuzzi, Cesare and Gutman, Per-Olof and Kaitovi{\'c}, Igor and Larcher, Luca and Marzani, Stefano and Ruggeri, Massimiliano and Zagurskis, Valerijs}
}
@conference {159.LuVuKaEr12.MELECON,
	title = {Virtual Metering for Virtual PHEV Aggregation},
	booktitle = {Proceedings of the 16th IEEE Mediterranean Electrotechnical Conference (MELECON2012)},
	year = {2012},
	month = {March 25-28},
	address = {Yasmine Hammamet, Tunisia},
	abstract = {Technically sustainable solutions for integration of (PH)EVs in Smart Grid emerge as an important concern. We discuss the need for introduction of Virtual Aggregations supported by implementation of Virtual Meters in power system structures. We advocate our proposal with an evaluation of scenarios based on realistic data. The structure and functionalities of the Virtual Aggregator, as well as proposed enhancements on the Smart Grid side, are presented.},
	author = {Lukovi{\'c}, Slobodan and Vukmirovi{\'c}, Srdjan and Kaitovi{\'c}, Igor and Erdeljan, Aleksandar}
}
@conference {150.KaLu11,
	title = {Adoption of Model-Driven methodology to aggregations design in Power Grid},
	booktitle = {INDIN {\textquoteright}11: Proceedings of the 9th IEEE International Conference on Industrial Informatics},
	year = {2011},
	month = {July 26-29},
	pages = {1{\textendash}6},
	address = {Caparica, Lisbon, Portugal},
	abstract = {Economical and environmental concerns push toward novel solutions for sustainable, renewable and intelligent energy power grid, the Smart Grid. Very often, this includes aggregation of renewable resources and intelligent loads such as electrical vehicles. Such complex system involve a number of various stakeholders coming from different areas of expertise. Even so, on-going projects do not apply unique formal language. In order to better correlate the projects, model-driven methodology and SysML are proposed for system design.},
	keywords = {EVs agregation, model-driven design, smart grid, SysML},
	doi = {http://dx.doi.org/10.1109/INDIN.2011.6034936},
	author = {Kaitovi{\'c}, Igor and Lukovi{\'c}, Slobodan}
}
@conference {18493,
	title = {ADSC: Application-Driven Storage Control for Energy Efficiency},
	booktitle = {Information and Communication on Technology for the Fight against Global Warming - First International Conference ICT-GLOW},
	series = {Lecture Notes in Computer Science },
	volume = {6868},
	year = {2011},
	month = {08/2011},
	pages = {165-179},
	publisher = {Springer},
	organization = {Springer},
	address = {Toulouse, France},
	abstract = {While performance and quality of service are the main criteria for application data management on storage units, energy efficiency is increasingly being stated as an additional criterion for evaluation. Due to the increasing energy consumption of storage subsystems, improving their energy efficiency is an important issue. In this paper we present a novel approach to storage management whereby both mid-level (file placement) and low level (disk mode) aspects are controlled, in a tiered storage architecture. The proposed mechanism is based on policies, and it is implemented via fuzzy logic rules, in contrast to attempting to build a model of the storage subsystem. The inputs to the storage management system are high level (application), mid level (file system) and low level (disk access patterns) information. The effectiveness of our approach has been validated by means of a case study using a TPC-C benchmark modified to access file level data. Results from this simulation are presented.},
	isbn = {978-3-642-23446-0},
	doi = {10.1007/978-3-642-23447-7_15},
	url = {http://dx.doi.org/10.1007/978-3-642-23447-7_15},
	author = {Cappiello, Cinzia and Hinostroza, Alicia and Pernici, Barbara and Sami, Mariagiovanna and Henis, Ealan and Kat, Ronen I. and Meth, Kalman Z. and Mura, Marcello}
}
@inbook {141.aetherinbook.2011,
	title = {AETHER: Self-Adaptive Networked Entities: Autonomous Computing Elements for Future Pervasive Applications and Technologies},
	booktitle = {Reconfigurable Computing: From FPGAs to Hardware/Software Codesign},
	year = {2011},
	pages = {149{\textendash}184},
	publisher = {Springer},
	organization = {Springer},
	address = {New York, USA},
	abstract = {The AETHER project has laid the foundation of a complete new framework for designing and programming computing resources that live in changing environments and need to re-configure their objectives in a dynamic way. This chapter contributes to a strategic research agenda in the field of self-adaptive computing systems. It brings inputs to the reconfigurable hardware community and proposes directions to go for reconfigurable hardware and research on self-adaptive computing; it tries to identify some of the most promising future technologies for reconfiguration, while pointing out the main foreseen Challenges for reconfigurable hardware. This chapter presents the main solutions the AETHER project proposed for some of the major concerns in trying to engineer a self-adaptive computing system. The text exposes the AETHER vision of self-adaptation and its requirements. It describes and discusses the proposed solutions for tackling self-adaptivity at the various levels of abstractions. It exposes how the developed technologies could be put together in a real methodology and how self-adaptation could then be used in potential applications. Finally and based on lessons learned from AETHER, we discuss open issues and research opportunities and put those in perspective along other investigations and roadmaps.},
	isbn = {978-1-4614-0061-5},
	author = {Gamrat, Christian and Philippe, Jean-Marc and Jesshope, Chris and Shafarenko, Alex and Bisdounis, Labros and Bondi, Umberto and Ferrante, Alberto and Cabestany, Joan and Huebner, Michael and Parsinnen, Juha and Kadlec, Jiri and Danek, Martin and Tain, Benoit and Eisenbach, Susan and Auguin, Michel and Diguet, Jean-Philippe and Lenormand, Eric and Roux, Jean-Luc},
	editor = {Cardoso, Joao Manuel Pai and Huebner, Michael}
}
@conference {152.KrLeAhPoLi11.SiPS,
	title = {Beamforming for interference mitigation and its implementation on an SDR baseband processor},
	booktitle = {SiPS{\textquoteright}11: Proceedings of the IEEE Workshop on Signal Processing Systems},
	year = {2011},
	month = {October 4-7},
	pages = {1{\textendash}6},
	address = {Beirut, Lebanon},
	abstract = {We present the first implementation of a distributed beamforming algorithm for interference mitigation on an SDR baseband processor. Co-channel interference (CCI) is becoming a major source of impairments in wireless communications and distributed beamforming is a promising technique to mitigate its negative impact. However, such schemes are challenging to implement in practical scenarios due to their complexity and synchronization requirements. In this paper, we report on implementation of a suboptimal, yet efficient, beamforming scheme for CCI mitigation and present the complexity modeling and algorithm transformations for achieving numerically stability. We also present the fixed-point quantization and the proper mapping on a parallel programmable baseband architecture aimed for software-defined radio (SDR). We optimize this algorithm for a coarse grained reconfigurable array (CGRA) processor and evaluate it in the context of the LTE standard.},
	keywords = {beamforming, coarse grained reconfigurable array (CGRA), fixed-point arithmetic, long term evolution (LTE), software defined radio (SDR)},
	doi = {http://dx.doi.org/10.1109/SiPS.2011.6088973},
	author = {Krdu, Adrian and Lebrun, Yann and Ahmad, Ubaid and Pollin, Sofie and Li, Min}
}
@inbook {140.KaTuPaSiZaMaBoDo.2011,
	title = {Design Space Exploration of Parallel Architectures},
	booktitle = {Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach},
	year = {2011},
	publisher = {Springer},
	organization = {Springer},
	address = {New York, USA},
	abstract = {This chapter will present two significant applications of the MULTICUBE design space exploration framework. The first part will present the design space exploration of a low power processor developed by STMicroelectronics by using the modeFRONTIER tool to demonstrate the benefits DSE not only in terms of objective quality, but also in terms of impact on the design process within the corporate environment. The second part will describe the application of RSM models developed within MULTICUBE to a tiled, multiple-instruction, many-core architecture developed by ICT China. Overall, the results have showed that different models can present a trade-off of accuracy versus computational effort. In fact, throughout the evaluation, we observed that high accuracy models require high computational time (for both model construction time and prediction time); vice-versa low model construction and prediction time has led to low accuracy.},
	author = {Kavka, Carlos and Turco, Alessandro and Palermo, Gianluca and Silvano, Cristina and Zaccaria, Vittorio and Mariani, Giovanni and Bocchio, Sara and Dongrui, Fan}
}
@conference {18079,
	title = {Exploring the Feasibility of Low Cost Fault Injection Attacks on Sub-Threshold Devices through an Example of a 65nm AES Implementation},
	booktitle = {7th Workshop on RFID Security and Privacy (RFIDSec)},
	year = {2011},
	month = {June},
	address = {Amherst, Massachussets, USA},
	author = {Barenghi, Alessandro and Hocquet, C{\'e}dric and Bol, David and Standaert, Fran{\c c}ois-Xavier and Regazzoni, Francesco and Koren, Israel}
}
@article {18063,
	title = {Harvesting the potential of nano-CMOS for lightweight cryptography: An ultra-low-voltage 65 nm AES coprocessor for passive RFID tags},
	journal = {Springer Journal of Cryptographic Engineering},
	volume = {1},
	issue = {1},
	year = {2011},
	author = {Hocquet, C{\'e}dric and Kamel, Dina and Regazzoni, Francesco and Legat, Jean-Didier and Flandre, Denis and Bol, David and Standaert, Fran{\c c}ois-Xavier}
}
@conference {18078,
	title = {Low Cost FPGA Implementations of the SHA-3 Finalists},
	booktitle = {10th Smart Card Research and Advanced Application Conference (CARDIS)},
	year = {2011},
	month = {September},
	address = {Leuven, Belgium},
	author = {Kerckhof, St{\'e}phanie and Durvaux, Fran{\c c}ois and Veyrat-Charvillon, Nicolas and Regazzoni, Francesco and de Dormale, Guerric Meurice and Standaert, Fran{\c c}ois-Xavier}
}
@inbook {17734,
	title = {The MULTICUBE Design Flow},
	booktitle = {Multi-objective Design Space Exploration of Multiprocessor SoC Architectures},
	year = {2011},
	pages = {3-17},
	publisher = {Springer New York},
	organization = {Springer New York},
	isbn = {978-1-4419-8836-2},
	doi = {10.1007/978-1-4419-8837-9_1},
	url = {http://dx.doi.org/10.1007/978-1-4419-8837-9_1},
	author = {Silvano, Cristina and Fornaciari, William and Palermo, Gianluca and Zaccaria, Vittorio and Castro, Fabrizio and Martinez, Marcos and Bocchio, Sara and Zafalon, Roberto and Avasare, Prabhat and Vanmeerbeeck, Geert and Ykman-Couvreur, Chantal and Wouters, Maryse and Kavka, Carlos and Onesti, Luka and Turco, Alessandro and Bondi, Umberto and Mariani, Giovanni and Posadas, Hector and Villar, Eugenio and Wu, Chris and Dongrui, Fan and Hao, Zhang},
	editor = {Silvano, Cristina and Fornaciari, William and Villar, Eugenio}
}
@inbook {139.Sietal2.2011,
	title = {MULTICUBE: Multi-Objective Design Space Exploration of Multi-Core Architectures},
	booktitle = {VLSI 2010 Annual Symposium},
	volume = {105},
	year = {2011},
	pages = {47-63},
	publisher = {Springer},
	organization = {Springer},
	address = {Netherlands},
	abstract = {Given the increasing complexity of Chip Multi-Processors (CMPs), a wide range of architecture parameters must be explored at design time to find the best trade-off in terms of multiple competing objectives (such as energy, delay, bandwidth, area, etc.) The design space of the target architectures is huge because it should consider all possible combinations of each hardware parameter (e.g., number of processors, processor issue width, L1 and L2 cache sizes, etc.). In this complex scenario, intuition and past experience of design architects is no more a sufficient condition to converge to an optimal design of the system. Indeed, Automatic Design Space Exploration (DSE) is needed to systematically support the analysis and quantitative comparison of a large amount of design alternatives in terms of multiple competing objectives (by means of Pareto analysis). The main goal of the MULTICUBE project consists of the definition of an automatic Design Space Exploration framework to support the design of next generation many-core architectures.},
	isbn = {978-94-007-1487-8},
	url = {http://dx.doi.org/10.1007/978-94-007-1488-5_4},
	author = {Silvano, Cristina and Fornaciari, William and Palermo, Gianluca and Zaccaria, Vittorio and Castro, Fabrizio and Martinez, Marcos and Bocchio, Sara and Zafalon, Roberto and Avasare, Prabhat and Vanmeerbeeck, Geert and Ykman-Couvreur, Chantal and Wouters, Maryse and Kavka, Carlos and Onesti, Luka and Turco, Alessandro and Bondi, Umberto and Mariani, Giovanni and Posadas, Hector and Villar, Eugenio and Wu, Chris and Dongrui, Fan and Hao, Zhang and Shibin, Tang}
}
@conference {148.DeKaFi11.NOCS,
	title = {Online Task Remapping Strategies for Fault-tolerant Network-on-Chip Multiprocessors},
	booktitle = {NOCS {\textquoteright}11: Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip},
	year = {2011},
	month = {05/2011},
	pages = {1{\textendash}8},
	address = {Pittsburgh, Pennsylvania, USA},
	abstract = {As CMOS technology scales down into the deep submicron domain, the aspects of fault tolerance in complex Networks-on-Chip (NoCs) architectures are assuming an increasing relevance. Task remapping is a software based solution for dealing with permanent failures in processing elements in the NoC. In this work, we formulate the optimal task mapping problem for mesh-based NoC multiprocessors with deterministic routing as an integer linear programming (ILP) problem with the objective of minimizing the communication traffic in the system and the total execution time of the application. We find the optimal mappings at design time for all scenarios where single-faults occur in the processing nodes. We propose heuristics for the online task remapping problem and compare their performances with the optimal solutions.},
	keywords = {adaptivity, fault tolerance, kahn process networks (KPN), mapping, network-on-chip (NoC), self-adaptivity},
	doi = {http://dx.doi.org/10.1145/1999946.1999967},
	author = {Derin, Onur and Kabakci, Deniz and Fiorin, Leandro}
}
@inbook {143.RiKaTuPaSiZaMa.2011,
	title = {Optimization Algorithms for Embedded System Design Space Exploration},
	booktitle = {Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach},
	year = {2011},
	publisher = {Springer},
	organization = {Springer},
	address = {New York, USA},
	abstract = {This paper is dedicated to the optimization algorithms developed in the MULTICUBE project and to their surrounding environment. Two software design space exploration (DSE) tools host the algorithms: Multicube Explorer and mode-FRONTIER. The description of the proposed algorithms is the central part of the paper. The focus will be on newly developed algorithms and on ad-hoc extensions of existing techniques in order to face with discrete and categorical design space parameters that are very common when working with embedded systems design. This paper will also provide some fundamental guidelines to build a strategy for testing the performance and accuracy of such algorithms. The aim is mainly to build confidence in optimization techniques, rather than to simply compare one algorithm versus another one. The no-free-lunch theorem for optimization has to be taken into consideration and therefore the analysis will look forward to robustness and industrial reliability of the results.},
	author = {Rigoni, Enrico and Kavka, Carlos and Turco, Alessandro and Palermo, Gianluca and Silvano, Cristina and Zaccaria, Vittorio and Mariani, Giovanni}
}
@inbook {142.PaSiZaRiKaTuMa.2011,
	title = {Response Surface Modeling for Embedded System Design Space Exploration},
	booktitle = {Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach},
	year = {2011},
	publisher = {Springer},
	organization = {Springer},
	address = {New York, USA},
	abstract = {A typical design space exploration flow involves an event-based simulator in the loop, often leading to an actual evaluation time that can exceed practical limits for realistic applications. Chip multi-processor architectures further exacerbate this problem given that the actual simulation speed decreases by increasing the number of cores of the chip. Traditional design space exploration lacks of efficient techniques that reduce the number of architectural alternatives to be analyzed. In this chapter, we introduce a set of statistical and machine learning techniques that can be used to predict system level metrics by using closed-form analytical expressions instead of lengthy simulations; the latter are called Response Surface Models (RSM). The principle of RSM is to exploit a set of simulations generated by one or more Design of Experiments strategies to build a surrogate model to predict the system-level metrics. The response model has the same input and output features of the original simulation based model but offers significant speed-up by leveraging analytical, closed-form functions which are tuned during model training. The techniques presented in this chapter can be used to improve the performance of traditional design space exploration algorithms such as those presented in Chap. 3.},
	author = {Palermo, Gianluca and Silvano, Cristina and Zaccaria, Vittorio and Rigoni, Enrico and Kavka, Carlos and Turco, Alessandro and Mariani, Giovanni}
}
@conference {124.LuKaBo10,
	title = {Adopting system engineering methodology to Virtual Power Systems design flow},
	booktitle = {CPSWEEK/GREEMBED 2010: Proceedings of the First Workshop on Green and Smart Embedded System Technology: Infrastructures, Methods and Tools},
	year = {2010},
	month = {April},
	address = {Stockholm, Sweden},
	abstract = {The concept of Virtual Power System (VPS) emerges as a promising response for increased concerns on secure, sustainable and at the same time {\textquoteright}clean{\textquoteright} energy supply requests. This novel concept aims at boosting operational efficiency of Distributed Energy Resources (DER) but also at establishing them as an autonomous commercial actor on the open energy market. Nevertheless, VPSs are fairly complex HW/SW systems that require holistic multidisciplinary approach and also novel specification, modeling and analysis instruments to facilitate mutual understanding among stakeholders from different fields. We introduce UML/SysML based modeling methodology to describe such power system related issues aiming at providing an unified modeling instrument applicable for VPSs design flow. In the proposed system engineering methodology, system representation starts from a very general context description and gets refined through different levels of abstraction down to concrete embedded systems employed to perform defined tasks.},
	author = {Lukovi{\'c}, Slobodan and Kaitovi{\'c}, Igor and Bondi, Umberto}
}
@conference {135.VuLuErKu10.2,
	title = {An enhanced workflow management for Utility Management System},
	booktitle = {Proceedings of the International Congress on Ultra Modern Telecommunications and Control Systems (ICUMT 2010)},
	year = {2010},
	month = {October 18-20},
	address = {Moscow, Russia},
	abstract = {The emerging computational grid infrastructure consists of widely distributed heterogeneous resources, which makes mapping of increasingly complex applications a very challenging task. Utility Management Systems (UMS) manage very large number of workflows with very high resource requirements and thereby optimization of resource utilization has to be adapted. In this work we propose architecture that implements a novel concept for dynamical execution of a scheduling algorithm using near real-time feedback from the execution monitoring process. An Artificial Neural Network (ANN) was trained for workflow scheduling. In the case study, we first perform experiments with same number of workflows and then introduce two additional in the system observing its behavior with and without proposed improvements. Performance tests show that significant improvements of overall execution time can be achieved by introducing adaptive Artificial Neural Network.},
	doi = {http://dx.doi.org/10.1109/ICUMT.2010.5676601},
	author = {Vukmirovi{\'c}, Srdjan and Lukovi{\'c}, Slobodan and Erdeljan, Aleksandar and Kuli{\'c}, Filip}
}
@conference {130.LuKaMuBoKuPo10,
	title = {Functional model of Virtual Power Plant (VPP)},
	booktitle = {Proceedings of the 2010 CIGRE (International Council on Large Electric Systems) Session},
	year = {2010},
	month = {July},
	address = {Paris, France},
	keywords = {smart grid, unified modeling language (UML), virtual power plants},
	author = {Lukovi{\'c}, Slobodan and Kaitovi{\'c}, Igor and Mura, Marcello and Bondi, Umberto and Kuli{\'c}, Filip and Popovi{\'c}, Dragan}
}
@conference {18082,
	title = {Hardware Trojans for Inducing or Amplifying Side-Channel Leakage of Cryptographic Software},
	booktitle = {2nd International Conference on Trusted Systems (INTRUST)},
	year = {2010},
	month = {December},
	address = {Beijing, China},
	author = {Gallais, Jean-Francois and Gro{\ss}sch{\"a}dl, Johann and Hanley, Neil and Kasper, Markus and Medwed, Marcel and Regazzoni, Francesco and Schmidt, Joern-Marc and Tillich, Stefan and Wojcik, Marcin}
}
@conference {18087,
	title = {Low Cost Software Countermeasures Against Fault Attacks: Implementation and Performances Trade Offs},
	booktitle = {5th Workshop on Embedded Systems Security (WESS)},
	year = {2010},
	month = {October},
	address = {Scottsdale, Arizona, USA},
	author = {Barenghi, Alessandro and Breveglieri, Luca and Koren, Israel and Pelosi, Gerardo and Regazzoni, Francesco}
}
@conference {129.Sietal.ISVLSI11,
	title = {Multicube: Multi-objective design space exploration of multi-core architectures},
	booktitle = {ISVLSI 2010: IEEE Annual Symposium on VLSI},
	year = {2010},
	month = {July},
	pages = {488{\textendash}493},
	address = {Lixouri, Kefalonia - Greece},
	abstract = {Technology trends enable the integration of many processor cores in a System-on-Chip (SoC). In these complex architectures, several architectural parameters can be tuned to find the best trade-off in terms of multiple metrics such as energy and delay. The main goal of the MULTICUBE project consists of the definition of an automatic Design Space Exploration framework to support the design of next generation many-core architectures.},
	doi = {http://dx.doi.org/10.1109/ISVLSI.2010.67},
	author = {Silvano, Cristina and Fornaciari, William and Palermo, Gianluca and Zaccaria, Vittorio and Castro, Fabrizio and Martinez, Marcos and Bocchio, Sara and Zafalon, Roberto and Avasare, Prabhat and Vanmeerbeeck, Geert and Ykman-Couvreur, Chantal and Wouters, Maryse and Kavka, Carlos and Onesti, Luka and Turco, Alessandro and Bondi, Umberto and Mariani, Giovanni and Posadas, Hector and Villar, Eugenio and Wu, Chris and Dongrui, Fan and Hao, Zhang and Shibin, Tang}
}
@conference {137.VuLuErKu10.3,
	title = {A Smart Metering Architecture as a step towards Smart Grid realization},
	booktitle = {Proceedings of the IEEE EnergyCon 2010},
	year = {2010},
	month = {December 18-22},
	address = {Bahrain},
	abstract = {Emerging concept of Smart Grids aims at increasing visibility and controllability of electricity grids boosting their operational efficiency, enabling novel enhanced services to customers and utilities at a same time. Successful realization of this concept will in great part depend on efficient management of tremendous amounts of data to be gathered and processed in very short time periods. In this work we propose a novel smart metering architecture to manage data collected from deployed smart meters logically encapsulated in form of virtual meters. The metering infrastructure is structured in the form of Advanced Metering Infrastructure (AMI). The architecture of Meter Data Management (MDM) system as well and its integration in Control Center structure of power system is described in details. The testing and verification of proposed solution is performed on data from power distribution company Vattenfall, Sweden.},
	doi = {http://dx.doi.org/10.1109/ENERGYCON.2010.5771705},
	author = {Vukmirovi{\'c}, Srdjan and Lukovi{\'c}, Slobodan and Erdeljan, Aleksandar and Kuli{\'c}, Filip}
}
@conference {122.VuErKuLu10,
	title = {Software architecture for Smart Metering systems with Virtual Power Plant},
	booktitle = {Proceedings of the 15th IEEE Mediterranean Electrotechnical Conference (MELECON2010)},
	year = {2010},
	month = {April},
	address = {La Valleta, Malta},
	abstract = {This paper presents a novel architecture for Smart Metering systems which enables their seamless, secure and efficient integration in wider SmartGrid software structures. Smart metering solutions represent one of the fastest evolving areas in the field of power distribution systems. There is an extensive interest of leading software vendors in the field, for development of architectures that can efficiently manage transmission, processing and storing of tremendous amount of data produced by such metering devices deployed at the end-end side. The integration of these systems into existing power system software architectures (outage management, workforce management, etc.) represents a major challenge for research community. In such an environment it is extremely important to adopt standardized data exchange mechanisms. The proposed architecture is conceived as modular and scalable structure so that it can help implementation of novel power distribution concepts such as Virtual Power Plants (VPPs). The proposed architecture has been successfully tested and verified in real-life operation as one of modules of Smart Metering system named Meter Data Management (MDM) developed by Telvent DMS Llc, Serbia.},
	doi = {http://dx.doi.org/10.1109/MELCON.2010.5476237},
	author = {Vukmirovi{\'c}, Srdjan and Erdeljan, Aleksandar and Kuli{\'c}, Filip and Lukovi{\'c}, Slobodan}
}
@conference {131.VuLuErKu10,
	title = {A solution for CIM based integraton of Meter Data Management in Control Center of a power system},
	booktitle = {Proceedings of the 2010 IEEE Workshop on Environmental, Energy, and Structural Monitoring Systems (EESMS{\textquoteright}10)},
	year = {2010},
	month = {September 9},
	address = {Taranto, Italy},
	abstract = {Modern power systems, in particular Control Center structures, involve more and more software applications in their normal operation. Such scenario urges for standardization of inter and intra processes communication and data exchange. In this work we propose a solution for seamless Meter Data Management (MDM) integration with Control Center structures through Common Information Model (CIM). The solution is implemented in form of a wrapper that adopts messages (i.e. payloads) to the standard requested form. The proposed solution has been verified using a simulation framework which emulates regular control and data.},
	keywords = {monitoring and control, system level modeling, virtual power plants},
	doi = {http://dx.doi.org/10.1109/EESMS.2010.5634169},
	author = {Vukmirovi{\'c}, Srdjan and Lukovi{\'c}, Slobodan and Erdeljan, Aleksandar and Kuli{\'c}, Filip}
}
@conference {113.LuCoKu10,
	title = {A system level model of possible integration of Building Management System in SmartGrid},
	booktitle = {Complexity in Engineering (COMPENG 2010)},
	year = {2010},
	month = {February 22-24},
	address = {Rome, Italy},
	abstract = {SmartGrids are conceived as modular, end-to-end interoperable systems. It is envisaged that power systems components (modules) will be hierarchically coordinated and integrated in order to form certain autonomous clusters which would perform as much as possible local data storing and processing in order to decrease overall communicational and computational overhead. Building Management Systems (BMS) could be seen as one of such modules inside wider SmartGrid system. The incorporation of BMS must consider both technical as well as commercial issues. Hence, the efficient integration will require standards{\textquoteright} harmonization and closer interaction among key elements of these systems. Moreover, another important issue will be adopting of new market models to BMS. In order to represent the system and relations among its components in a clear and understandable fashion, we introduce system level modeling concept as an instrument to bridge functional requirements and implementation constraints.},
	doi = {http://dx.doi.org/10.1109/COMPENG.2010.43},
	author = {Lukovi{\'c}, Slobodan and {\v C}ongradac, Velimir and Kuli{\'c}, Filip}
}
@conference {112.LuKaMuBo10,
	title = {Virtual Power Plant as a bridge between Distributed Energy Resources and Smart Grid},
	booktitle = {Proceedings of 43th Hawaii International Conference on System Sciences (HICSS{\textquoteright}43)},
	year = {2010},
	month = {January},
	address = {Hawaii, USA},
	abstract = {The liberalization of energy markets, especially in correlation with the Smart Grid concept development, requires adjusted legislation, new business models, energy stock exchanges establishment and many other advanced instruments. Realization of these features necessitates novel concepts to support such changes in the power system while granting security and reliability of supply. Such evolution poses new challenges to ICT (Information and Communication Technologies) to bridge the gap between increased complexity of deregulated market and on the other side expected rapid growth of number of players in power systems. Increasing presence of Distributed Energy Resources (DER) implementations constitutes a further source of complexity. Bearing in mind ongoing and possible scenarios we aim to determinate the place and role of the novel Virtual Power Plants (VPP) concept, related to the Smart Grid structure. At the same time we introduce an innovative modeling approach as an instrument to determine actors and highlight their actual roles and interactions from different point of view, trying to pave the way for development of a common understanding platform for variety of stakeholders. The effectiveness of the proposed modeling concept is shown through a number of UML models representing system level description of VPP at different levels of abstraction.},
	keywords = {distributed energy resources, smart grid, unified modeling language (UML), virtual power plants},
	doi = {http://dx.doi.org/10.1109/HICSS.2010.437},
	author = {Lukovi{\'c}, Slobodan and Kaitovi{\'c}, Igor and Mura, Marcello and Bondi, Umberto}
}
@article {18492,
	title = {Breaking ECC2K-130},
	journal = {IACR Cryptology ePrint Archive},
	volume = {2009},
	year = {2009},
	month = {11/2009},
	pages = {541},
	abstract = {Elliptic-curve cryptography is becoming the standard public-key primitive not only for mobile devices but also for high-security applications. Advantages are the higher cryptographic strength per bit in comparison with RSA and the higher speed in implementations. To improve understanding of the exact strength of the elliptic-curve discrete-logarithm problem, Certicom has published a series of challenges. This paper describes breaking the ECC2K-130 challenge using a parallelized version of Pollard{\textquoteright}s rho method. This is a major computation bringing together the contributions of several clusters of conventional computers, PlayStation~3 clusters, computers with powerful graphics cards and FPGAs. We also give /preseestimates for an ASIC design. In particular we present * our choice and analysis of the iteration function for the rho method; * our choice of finite field arithmetic and representation; * detailed descriptions of the implementations on a multitude of platforms: CPUs, Cells, GPUs, FPGAs, and ASICs; * details about running the attack. },
	keywords = {Attacks, automorphisms, binary fields, Certicom challenges, DLP, ECC, implementation, Koblitz curves, parallelized Pollard rho},
	url = {http://eprint.iacr.org/2009/541},
	author = {Bailey, Daniel V. and Batina, Lejla and Bernstein, Daniel J. and Birkner, Peter and Bos, Joppe W. and Chen, Hsieh - Chung and Cheng, Chen - Mou and van Damme, Gauthier and G{\"u}neysu, Tim and Gurkaynak, Frank and Kleinjung, Thorsten and Paar, Christof and Regazzoni, Francesco and Niederhagen, Ruben and Schwabe, Peter and Uhsadel, Leif and Van Herrewege, Anthony}
}
@conference {18084,
	title = {The Certicom Challenges ECC2-X},
	booktitle = {Workshop on Special Purpose Hardware for Attacking Cryptographic Systems (SHARCS)},
	year = {2009},
	month = {September},
	address = {Lausanne, Switzerland},
	author = {Bailey, Daniel V. and Baldwin, Brian and Batina, Lejla and Bernstein, Daniel J. and Birkner, Peter and Bos, Joppe W. and van Damme, Gauthier and de Meulenaer, Giacomo and Fan, Junfeng and Gurkaynak, Frank and G{\"u}neys, Tim and Kleinjung, Thorsten and Lange, Tanja and Mentens, Nele and Paar, Christof and Regazzoni, Francesco and Schwabe, Peter and Uhsadel, Leif}
}
@inbook {18085,
	title = {A Design Flow and Evaluation Framework for DPA-resistant Instruction Set Extensions},
	booktitle = {Cryptographic Hardware and Embedded Systems (CHES)},
	series = {Lecture Notes in Computer Science},
	volume = {5747},
	year = {2009},
	month = {September},
	pages = {205-219},
	publisher = {Springer Berlin Heidelberg},
	organization = {Springer Berlin Heidelberg},
	address = {Lausanne, Switzerland},
	abstract = {Power-based side channel attacks are a significant security risk, especially for embedded applications. To improve the security of such devices, protected logic styles have been proposed as an alternative to CMOS. However, they should only be used sparingly, since their area and power consumption are both significantly larger than for CMOS. We propose to augment a processor, realized in CMOS, with custom instruction set extensions, designed with security and performance as the primary objectives, that are realized in a protected logic. We have developed a design flow based on standard CAD tools that can automatically synthesize and place-and-route such hybrid designs. The flow is integrated into a simulation and evaluation environment to quantify the security achieved on a sound basis. Using MCML logic as a case study, we have explored different partitions of the PRESENT block cipher between protected and unprotected logic. This experiment illustrates the tradeoff between the type and amount of application-level functionality implemented in protected logic and the level of security achieved by the design. Our design approach and evaluation tools are generic and could be used to partition any algorithm using any protected logic style.},
	isbn = {978-3-642-04137-2},
	doi = {10.1007/978-3-642-04138-9_15},
	author = {Regazzoni, Francesco and Cevrero, Alessandro and Standaert, Fran{\c c}ois-Xavier and Badel, St{\'e}phane and Kluter, Theo and Brisk, Philip and Leblebici, Yusuf and Ienne, Paolo}
}
@conference {102.LuKaMuBo09,
	title = {Functional requirements of embedded systems for monitoring and control structure of Virtual Power Plants},
	booktitle = {Proceedings of the 2009 IEEE Workshop on Environmental, Energy, and Structural Monitoring Systems},
	year = {2009},
	month = {September},
	address = {Crema, Italy},
	abstract = {Efficient integration of distributed renewable generation into a reliable single entity in technical and commercial terms is one of key issues for successful realization of smart-grids. The novel concept of Virtual Power Plants (VPP) emerges to be promising response to these needs. ICT is the enabling technology for VPP implementation. In fact, an efficient monitoring and control system coupled with appropriate communication structure must be designed in a scalable and modular way so that full interoperability among components of the system is achieved. On top of that, Control Center applications take care of power flow optimization (production, consumption, ancillary services) and high-level applications (e.g. energy trading, Demand Side Management etc.). In this work we focus on functional requirements for realization of such concept by means of embedded systems.},
	keywords = {monitoring and control, system level modeling, virtual power plants},
	doi = {http://dx.doi.org/10.1109/EESMS.2009.5341320},
	author = {Lukovi{\'c}, Slobodan and Kaitovi{\'c}, Igor and Mura, Marcello and Bondi, Umberto}
}
@conference {97.Silvanoetal09,
	title = {MULTICUBE: Multi-Objective Design Space Exploration of Multiprocessor Architectures for Embedded Multimedia Applications},
	booktitle = {Proceedings of the DATE{\textquoteright}09 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications},
	year = {2009},
	month = {April},
	address = {Nice, France},
	author = {Silvano, Cristina and Palermo, Gianluca and Zaccaria, Vittorio and Fornaciari, William and Zafalon, Roberto and Bocchio, Sara and Martinez, Marcos and Wouters, Maryse and Vanmeerbeeck, Geert and Avasare, Prabhat and Onesti, Luka and Kavka, Carlos and Bondi, Umberto and Mariani, Giovanni and Villar, Eugenio and Posadas, Hector and Wu, Chris and Dongrui, Fan and Hao, Zhang}
}
@conference {110.CoKuLu09,
	title = {Prediction of the type of heating with EnergyPlus program and fuzzy logic},
	booktitle = {40th International Congress on Heating, Refrigerating and Air-conditioning (KGH Congress)},
	year = {2009},
	month = {12/2009},
	address = {Belgrade, Serbia},
	abstract = {The purpose of this work is prediction of the type of heating for the next few days in an office building using EnergyPlus program for simulation and fuzzy logic for determination. In this matter a program that binds weather forecast, created simulation model in EnergyPlus of a five story building in Belgrade, simulation in EnergyPlus and fuzzy logic, and as a result program gives the type of heating which is the most economic to use for the particular day, was built. Everything is done in the way of most efficient and rational use of energy.},
	author = {{\v C}ongradac, Velimir and Kuli{\'c}, Filip and Lukovi{\'c}, Slobodan}
}
@conference {89.ReEiBrIeKo,
	title = {Can knowledge regarding the presence of countermeasures against fault attacks simplify power attacks on cryptographic devices?},
	booktitle = {Proceedings of 23rd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFTS 08)},
	year = {2008},
	month = {October 1-3},
	abstract = {Side-channel attacks are nowadays a serious concern when implementing cryptographic algorithms. Powerful ways for gaining information about the secret key as well as various countermeasures against such attacks have been recently developed. Although it is well known that such attacks can exploit information leaked from different sources, most prior works have only addressed the problem of protecting a cryptographic device against a single type of attack. Consequently, there is very little knowledge on how a scheme for protecting a device against one type of side-channel attack may affect its vulnerability to other types of side-channel attacks. In this paper we focus on devices that include protection against fault injection attacks (using different error detection schemes) and explore whether the presence of such fault detection circuits affects the resistance against attacks based on power analysis. Using the AES S-Box as an example, we performed attacks on the unprotected implementation as well as modified implementations with parity check circuits or residue check circuits (mod3 and mod7). In particular, we focus on the question whether the knowledge of the presence of error detection circuitry in the cryptographic device can help an attacker who attempts to mount a power attack on the device. Our results show that the presence of error detection circuitry helps the attacker even if he is unaware of this circuitry, and that the benefit to the attacker increases with the number of check bits used for the purpose of error detection.},
	author = {Regazzoni, Francesco and Eisenbarth, Thomas and Breveglieri, Luca and Ienne, Paolo and Koren, Israel}
}
@conference {67.ReEiGr07,
	title = {Power Attacks Resistance of Cryptographic S-boxes with added Error Detection Circuits},
	booktitle = {proceedings of: {\textquoteright}22nd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT{\textquoteright}07)},
	year = {2007},
	month = {September 26-28},
	address = {Rome, Italy},
	abstract = {Many side-channel attacks on implementations of cryptographic algorithms have been developed in recent years demonstrating the ease of extracting the secret key. In response, various schemes to protect cryptographic devices against such attacks have been devised and some implemented in practice. Almost all of these protection schemes target an individual side-channel attack and consequently, it is not obvious whether a scheme for protecting the device against one type of side-channel attacks may make the device more vulnerable to another type of side-channel attacks. We examine in this paper the possibility of such a negative impact for the case where fault detection circuitry is added to a device (to protect it against fault injection attacks) and analyze the resistance of the modified device to power attacks. To simplify the analysis we focus on only one component in the cryptographic device (namely, the S-box in the AES and Kasumi ciphers), and perform power attacks on the original implementation and on a modified implementation with an added parity check circuit. Our results show that the presence of the parity check circuitry has a negative impact on the resistance of the device to power analysis attacks.},
	keywords = {cryptography, fault tolerance, reliable applications, side channel attacks},
	author = {Regazzoni, Francesco and Eisenbarth, Thomas and Gro{\ss}sch{\"a}dl, Johann and Breveglieri, Luca and Ienne, Paolo and Koren, Israel and Paar, Christof}
}
@conference {65.GiTaVeBrKo07,
	title = {A Question Answering service for information retrieval in Cooper},
	booktitle = {COOPER Workshop in conjunction with EC-TEL07 Conference},
	year = {2007},
	month = {September 17},
	abstract = {In Cooper, part of the student support will be provided by a Question Answering application in the form of a webservice. Question Answering allows a user to use the content of project document as input to find related documents as well as related experts. Latent Semantic Analysis as an underlying technique is briefly discussed followed by a description of our Latent Semantic Analysis engine and the software architecture that was developed. Issues for further development are also mentioned. The final section contains a specific case study of an environment in which an implementation is planned.},
	keywords = {information retrieval, latent semantic analysis, question answering, singular value decomposition},
	author = {Giesbers, Bas and Taddeo, Antonio Vincenzo and Vegt, Wim and Bruggen, Jan and Koper, Rob}
}
@inbook {19.1016432,
	title = {UML-based specifications of an embedded system oriented to HW/SW partitioning: a case study},
	booktitle = {Languages for system specification: Selected contributions on UML, systemC, system Verilog, mixed-signal systems, and property specification from FDL{\textquoteright}03},
	year = {2004},
	pages = {71-84},
	publisher = {Kluwer Academic Publishers},
	organization = {Kluwer Academic Publishers},
	address = {Norwell, MA, USA},
	abstract = {The Unified Modelling Language (UML) is a language for specifying, visualizing, constructing, and documenting the artefacts of software systems, as well as for modeling business and other non-software systems. The UML represents a collection of best engineering practices that succeeded in modelling large and complex systems; it is interesting to envision its extension for specification and modelling of hardware-software systems as well, starting with the first design phases, i.e. prior to hardware-software partitioning. This paper analyses the development of a solution able to define the hardware/software partitioning of an embedded system starting from its UML system specifications. The case study chosen is a Wireless Meter Reader (WMR) dedicated to the measurement of energy consumption. The designers evaluated the hardware/software partitioning solution in terms of cost, performance, size and consumption.},
	keywords = {embedded systems, HW/SW partitioning, system specifications, unified modeling language (UML)},
	isbn = {1-4020-7990-7},
	author = {Prevostini, Mauro and Balzarini, Francesco and Kostadinov, Atanas Nikolov and Mankan, Srinivas and Martinola, Aris and Minosi, Antonio}
}
@conference {12.MiMaMaPreKoBa2003,
	title = {Intelligent, low-power and low-cost measurement system for energy consumption},
	booktitle = {VECIMS 2003},
	year = {2003},
	month = {July 27-29},
	pages = {125-130},
	address = {Lugano},
	abstract = {In the area of utility measurement systems, there is increasing awareness to the importance of using intelligent and secure meter readers. The aim is not simply that of reducing operational costs; aspects such as availability of real-time determination of consumption (mainly in the case of energy meters, but potentially also for water consumption etc.) are relevant not only for actions such as real-time billing but also in view of an increasing environmental awareness leading to {\textquoteright}preferential{\textquoteright} billing in particular times of the day or of the week and requiring availability of fine-grained statistics. All these actions in turn involve the requirement of data integrity; when utilities other than power providers are considered, the device should be battery-powered (and very long battery life must be granted), so that low-power design becomes a further requirement while being permanently either in active or in standby mode; moreover, not being connected to the power network means that wireless connections for transmitting and receiving information must be taken into account. Finally, these devices should be made available to the general public and thus be low-cost ones. This paper describes how all the above constraints have been analyzed in the design of a wireless meter reading system.},
	keywords = {measurement systems, meter reading systems, power consumption},
	author = {Minosi, Antonio and Martinola, Aris and Mankan, Srinivas and Prevostini, Mauro and Kostadinov, Atanas Nikolov and Balzarini, Francesco}
}
@conference {14.MiMaMaBaKoPre2003,
	title = {UML-based Specifications of an Embedded System Oriented to HW/SW Partitioning: a Case Study},
	booktitle = {FDL{\textquoteright}03},
	year = {2003},
	month = {September 23-26},
	pages = {226-237},
	address = {Frankfurt},
	abstract = {The Unified Modelling Language (UML) is a language for specifying, visualizing, constructing, and documenting the artefacts of software systems, as well as for modelling business and other non-software systems. The UML represents a collection of best engineering practices that succeeded in modelling large and complex systems; it is interesting to envision its extension for specification and modelling of hardware-software systems as well, starting with the first design phases, i.e. prior to hardware-software partitioning. This paper analyses the development of a solution able to define the hardware/software partitioning of an embedded system starting from its UML system specifications. The case study chosen is a Wireless Meter Reader (WMR) dedicated to the measurement of energy consumption. The designers evaluated the hard-ware/software partitioning solution in terms of cost, performance, size and consumption.},
	keywords = {embedded systems, HW/SW partitioning, unified modeling language (UML)},
	author = {Minosi, Antonio and Mankan, Srinivas and Martinola, Aris and Balzarini, Francesco and Kostadinov, Atanas Nikolov and Prevostini, Mauro}
}
