@inbook {140.KaTuPaSiZaMaBoDo.2011, title = {Design Space Exploration of Parallel Architectures}, booktitle = {Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach}, year = {2011}, publisher = {Springer}, organization = {Springer}, address = {New York, USA}, abstract = {This chapter will present two significant applications of the MULTICUBE design space exploration framework. The first part will present the design space exploration of a low power processor developed by STMicroelectronics by using the modeFRONTIER tool to demonstrate the benefits DSE not only in terms of objective quality, but also in terms of impact on the design process within the corporate environment. The second part will describe the application of RSM models developed within MULTICUBE to a tiled, multiple-instruction, many-core architecture developed by ICT China. Overall, the results have showed that different models can present a trade-off of accuracy versus computational effort. In fact, throughout the evaluation, we observed that high accuracy models require high computational time (for both model construction time and prediction time); vice-versa low model construction and prediction time has led to low accuracy.}, author = {Kavka, Carlos and Turco, Alessandro and Palermo, Gianluca and Silvano, Cristina and Zaccaria, Vittorio and Mariani, Giovanni and Bocchio, Sara and Dongrui, Fan} } @inbook {17734, title = {The MULTICUBE Design Flow}, booktitle = {Multi-objective Design Space Exploration of Multiprocessor SoC Architectures}, year = {2011}, pages = {3-17}, publisher = {Springer New York}, organization = {Springer New York}, isbn = {978-1-4419-8836-2}, doi = {10.1007/978-1-4419-8837-9_1}, url = {http://dx.doi.org/10.1007/978-1-4419-8837-9_1}, author = {Silvano, Cristina and Fornaciari, William and Palermo, Gianluca and Zaccaria, Vittorio and Castro, Fabrizio and Martinez, Marcos and Bocchio, Sara and Zafalon, Roberto and Avasare, Prabhat and Vanmeerbeeck, Geert and Ykman-Couvreur, Chantal and Wouters, Maryse and Kavka, Carlos and Onesti, Luka and Turco, Alessandro and Bondi, Umberto and Mariani, Giovanni and Posadas, Hector and Villar, Eugenio and Wu, Chris and Dongrui, Fan and Hao, Zhang}, editor = {Silvano, Cristina and Fornaciari, William and Villar, Eugenio} } @inbook {139.Sietal2.2011, title = {MULTICUBE: Multi-Objective Design Space Exploration of Multi-Core Architectures}, booktitle = {VLSI 2010 Annual Symposium}, volume = {105}, year = {2011}, pages = {47-63}, publisher = {Springer}, organization = {Springer}, address = {Netherlands}, abstract = {Given the increasing complexity of Chip Multi-Processors (CMPs), a wide range of architecture parameters must be explored at design time to find the best trade-off in terms of multiple competing objectives (such as energy, delay, bandwidth, area, etc.) The design space of the target architectures is huge because it should consider all possible combinations of each hardware parameter (e.g., number of processors, processor issue width, L1 and L2 cache sizes, etc.). In this complex scenario, intuition and past experience of design architects is no more a sufficient condition to converge to an optimal design of the system. Indeed, Automatic Design Space Exploration (DSE) is needed to systematically support the analysis and quantitative comparison of a large amount of design alternatives in terms of multiple competing objectives (by means of Pareto analysis). The main goal of the MULTICUBE project consists of the definition of an automatic Design Space Exploration framework to support the design of next generation many-core architectures.}, isbn = {978-94-007-1487-8}, url = {http://dx.doi.org/10.1007/978-94-007-1488-5_4}, author = {Silvano, Cristina and Fornaciari, William and Palermo, Gianluca and Zaccaria, Vittorio and Castro, Fabrizio and Martinez, Marcos and Bocchio, Sara and Zafalon, Roberto and Avasare, Prabhat and Vanmeerbeeck, Geert and Ykman-Couvreur, Chantal and Wouters, Maryse and Kavka, Carlos and Onesti, Luka and Turco, Alessandro and Bondi, Umberto and Mariani, Giovanni and Posadas, Hector and Villar, Eugenio and Wu, Chris and Dongrui, Fan and Hao, Zhang and Shibin, Tang} } @inbook {143.RiKaTuPaSiZaMa.2011, title = {Optimization Algorithms for Embedded System Design Space Exploration}, booktitle = {Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach}, year = {2011}, publisher = {Springer}, organization = {Springer}, address = {New York, USA}, abstract = {This paper is dedicated to the optimization algorithms developed in the MULTICUBE project and to their surrounding environment. Two software design space exploration (DSE) tools host the algorithms: Multicube Explorer and mode-FRONTIER. The description of the proposed algorithms is the central part of the paper. The focus will be on newly developed algorithms and on ad-hoc extensions of existing techniques in order to face with discrete and categorical design space parameters that are very common when working with embedded systems design. This paper will also provide some fundamental guidelines to build a strategy for testing the performance and accuracy of such algorithms. The aim is mainly to build confidence in optimization techniques, rather than to simply compare one algorithm versus another one. The no-free-lunch theorem for optimization has to be taken into consideration and therefore the analysis will look forward to robustness and industrial reliability of the results.}, author = {Rigoni, Enrico and Kavka, Carlos and Turco, Alessandro and Palermo, Gianluca and Silvano, Cristina and Zaccaria, Vittorio and Mariani, Giovanni} } @inbook {142.PaSiZaRiKaTuMa.2011, title = {Response Surface Modeling for Embedded System Design Space Exploration}, booktitle = {Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach}, year = {2011}, publisher = {Springer}, organization = {Springer}, address = {New York, USA}, abstract = {A typical design space exploration flow involves an event-based simulator in the loop, often leading to an actual evaluation time that can exceed practical limits for realistic applications. Chip multi-processor architectures further exacerbate this problem given that the actual simulation speed decreases by increasing the number of cores of the chip. Traditional design space exploration lacks of efficient techniques that reduce the number of architectural alternatives to be analyzed. In this chapter, we introduce a set of statistical and machine learning techniques that can be used to predict system level metrics by using closed-form analytical expressions instead of lengthy simulations; the latter are called Response Surface Models (RSM). The principle of RSM is to exploit a set of simulations generated by one or more Design of Experiments strategies to build a surrogate model to predict the system-level metrics. The response model has the same input and output features of the original simulation based model but offers significant speed-up by leveraging analytical, closed-form functions which are tuned during model training. The techniques presented in this chapter can be used to improve the performance of traditional design space exploration algorithms such as those presented in Chap. 3.}, author = {Palermo, Gianluca and Silvano, Cristina and Zaccaria, Vittorio and Rigoni, Enrico and Kavka, Carlos and Turco, Alessandro and Mariani, Giovanni} } @conference {129.Sietal.ISVLSI11, title = {Multicube: Multi-objective design space exploration of multi-core architectures}, booktitle = {ISVLSI 2010: IEEE Annual Symposium on VLSI}, year = {2010}, month = {July}, pages = {488{\textendash}493}, address = {Lixouri, Kefalonia - Greece}, abstract = {Technology trends enable the integration of many processor cores in a System-on-Chip (SoC). In these complex architectures, several architectural parameters can be tuned to find the best trade-off in terms of multiple metrics such as energy and delay. The main goal of the MULTICUBE project consists of the definition of an automatic Design Space Exploration framework to support the design of next generation many-core architectures.}, doi = {http://dx.doi.org/10.1109/ISVLSI.2010.67}, author = {Silvano, Cristina and Fornaciari, William and Palermo, Gianluca and Zaccaria, Vittorio and Castro, Fabrizio and Martinez, Marcos and Bocchio, Sara and Zafalon, Roberto and Avasare, Prabhat and Vanmeerbeeck, Geert and Ykman-Couvreur, Chantal and Wouters, Maryse and Kavka, Carlos and Onesti, Luka and Turco, Alessandro and Bondi, Umberto and Mariani, Giovanni and Posadas, Hector and Villar, Eugenio and Wu, Chris and Dongrui, Fan and Hao, Zhang and Shibin, Tang} } @conference {97.Silvanoetal09, title = {MULTICUBE: Multi-Objective Design Space Exploration of Multiprocessor Architectures for Embedded Multimedia Applications}, booktitle = {Proceedings of the DATE{\textquoteright}09 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications}, year = {2009}, month = {April}, address = {Nice, France}, author = {Silvano, Cristina and Palermo, Gianluca and Zaccaria, Vittorio and Fornaciari, William and Zafalon, Roberto and Bocchio, Sara and Martinez, Marcos and Wouters, Maryse and Vanmeerbeeck, Geert and Avasare, Prabhat and Onesti, Luka and Kavka, Carlos and Bondi, Umberto and Mariani, Giovanni and Villar, Eugenio and Posadas, Hector and Wu, Chris and Dongrui, Fan and Hao, Zhang} }