@Patent {18589,
	title = {Reconfigurable Logic Circuit},
	number = {GB1719355.8},
	year = {Submitted},
	month = {11/2017},
	type = {UK},
	author = {Mentens, Nele and Charbon, Edoardo and Regazzoni, Francesco}
}
@conference {18575,
	title = {Rethinking Secure FPGAs: TowardsCryptography-friendly Configurable Cell Architecture and its Automated Design Flow},
	booktitle = {Proceedings of FCCM},
	year = {2018},
	month = {05/2018},
	author = {Mentens, Nele and Charbon, Edoardo and Regazzoni, Francesco}
}
@conference {18478,
	title = {200 MS/s ADC implemented in a FPGA employing TDCs},
	booktitle = {FPGA International Symposium on Field-Programmable Gate Arrays ACM/SIGDA 2015},
	series = {Proceedings of the 2015 ACM/SIGDA},
	year = {2015},
	month = {02/2015},
	pages = {228-235},
	publisher = {ACM},
	organization = {ACM},
	address = {Monterey, CA, USA},
	abstract = {Analog signals are used in many applications and systems, such as cyber physical systems, sensor networks and automotive applications. These are also applications where the use of FPGAs is continuously growing. To date, however there is no direct integration between FPGAs, which are digital, and the analog world (except for the newest generation of FPGAs). Currently, an external analog-to-digital converter (ADC) has to be added to the system, thus limiting its overall compactness and flexibility.

To address this issue we propose a novel architecture implementing a high speed ADC in reconfigurable devices. The system exploits picosecond resolution time-to-digital converters (TDCs) to reach a conversion as fast as its clock speed. The resulting analog-through-time-to-digital converter (ATDC) can achieve a sampling rate of 200 MS/s with a 7 bit resolution for signals ranging from 0 to 2.5 V. Except for the external resistor needed for the analog reference ramp, the system is fully integrated inside the target FPGA. Moreover, our design can be easily scaled for multichannel ADCs, proving the suitability of reconfigurable devices for applications requiring a deep integration between analog and digital world.
},
	keywords = {analog-through time to digital convertor, FPGA-based design, reference voltage},
	isbn = {978-1-4503-3315-3},
	doi = {10.1145/2684746.2689070},
	url = {http://doi.acm.org/10.1145/2684746.2689070},
	author = {Homulle, Harald and Regazzoni, Francesco and Charbon, Edoardo}
}
@conference {18470,
	title = {Single-Photon Avalanche Diodes (SPADs) for quantum random number generators and beyond},
	booktitle = {19th Asia and South Pacific Design Automation Conference (ASP-DAC) 2014},
	year = {2014},
	month = {01/2014},
	publisher = {IEEE},
	organization = {IEEE},
	address = {Singapore},
	abstract = {Single-Photon Avalanche Diodes (SPADs) are solid-state photo-detectors capable of detecting single photons by exploiting the avalanche effect that occurs in the breakdown of a p-n junction biased above breakdown voltage. By this effect, a SPAD translates an incoming photon to a macroscopic current pulse. These devices are currently used for building medical devices characterized by a very high time resolution. An appealing application of SPAD is to use them as a basic block for building the entropy source of true random number generators. In this paper we focus on such application, and we explore the design challenges behind the realization of a quantum random number generator based on a massively parallel array of SPADs. The matrix under investigation comprises 512{\texttimes}128 independent cells that convert photons onto a raw bit-stream, which, as ensured by the properties of quantum physics, is characterized by a very high level of randomness. The sequences are read out in a 128-bit parallel bus, concatenated, and pipelined onto a de-biasing filter. Subsequently, we fabricated the proposed chip using a standard CMOS process. Our results, achieved on the manufactured device and coupling two matrices, show that our architecture can reach up to 5 Gbit/s while consuming 25pJ/bit, thus demonstrating scalability and performance for any random number generators based on SPADs},
	keywords = {quantum physics, random number generators, SPAD},
	isbn = {978-1-4799-2816-3},
	url = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6736726},
	author = {Regazzoni, Francesco and Burri, Samuel and Stucki, Damien and Maruyama, Yuki and Bruschini, Claudio and Charbon, Edoardo}
}
@conference {18069,
	title = {Comparison of Two Cameras based on Single Photon Avalanche Diodes (SPADS) for Fluorescence Lifetime Imaging Application with Picosecond Resolution},
	booktitle = {International Image Sensor Workshop (IISW)},
	year = {2013},
	month = {June},
	address = {Snowbird Resort, Utah, USA},
	author = {Powolny, Fran{\c c}ois and Burri, Samuel and Bruschini, Claudio and Michalet, Xavier and Regazzoni, Francesco and Charbon, Edoardo}
}
@conference {18068,
	title = {Jailbreak Imagers: Transforming a Single-Photon Image Sensor into a True Random Number Generator},
	booktitle = {International Image Sensor Workshop (IISW)},
	year = {2013},
	month = {June},
	address = {Snowbird Resort, Utah, USA},
	author = {Burri, Samuel and Stucki, Damien and Maruyama, Yuki and Bruschini, Claudio and Charbon, Edoardo and Regazzoni, Francesco}
}
@conference {18070,
	title = {Single-Photon Image Sensors},
	booktitle = {Special Session, 50th Design Automation Conference (DAC)},
	year = {2013},
	month = {June},
	address = {Austin, Texas, USA},
	author = {Charbon, Edoardo and Regazzoni, Francesco}
}
