@article {18567,
	title = {Customized Instructions for Protection Against Memory Integrity Attacks},
	journal = {IEEE Embedded Systems Letters},
	year = {In Press},
	author = {Roy, Debapriya Basu and Alam, Manaar and Bhattacharya, Sarani and Govindan, Vidya and Regazzoni, Francesco and Chakraborty, Rajat Subhra and Mukhopadhyay, Debdeep}
}
@article {18568,
	title = {Towards Low Energy Stream Ciphers},
	journal = {IACR Transactions on Symmetric Cryptology},
	year = {In Press},
	author = {Banik, Subhadeep and Mikhalev, Vasily and Armknecht, Frederik and Isobe, Takanori and Meier, Willi and Bogdanov, Andrey and Watanabe, Yuhei and Regazzoni, Francesco}
}
@article {18547,
	title = {Anomaly and Change Detection in Graph Streams through Constant-Curvature Manifold Embeddings},
	journal = {IJCNN 2018 : International Joint Conference on Neural Networks},
	year = {2018},
	month = {07/2018},
	author = {Zambon, Daniele and Livi, Lorenzo and Alippi, Cesare}
}
@book {18544,
	title = {Artificial Intelligence in the Age of Neural Networks and Brain Computing},
	series = {Academic Press },
	year = {2018},
	pages = {420},
	edition = {1},
	abstract = {Artificial Intelligence in the Age of Neural Networks and Brain Computing demonstrates that existing disruptive implications and applications of AI is a development of the unique attributes of neural networks, mainly machine learning, distributed architectures, massive parallel processing, black-box inference, intrinsic nonlinearity and smart autonomous search engines. The book covers the major basic ideas of brain-like computing behind AI, provides a framework to deep learning, and launches novel and intriguing paradigms as future alternatives. The success of AI-based commercial products proposed by top industry leaders, such as Google, IBM, Microsoft, Intel and Amazon can be interpreted using this book. },
	author = {Kozma, Robert and Alippi, Cesare and Choe, Yoonsuck and Morabito, Francesco}
}
@conference {18593,
	title = {A characterization of the Edge of Criticality in Binary Echo State Networks},
	booktitle = {2018 IEEE 28th International Workshop on Machine Learning for Signal Processing (MLSP)},
	year = {2018},
	month = {09/2018},
	address = {Aalborg, Denmark},
	author = {Verzelli, Pietro and Livi, Lorenzo and Alippi, Cesare}
}
@article {18545,
	title = {Concept Drift and Anomaly Detection in Graph Streams},
	journal = {IEEE Transactions on Neural Networks and Learning Systems},
	volume = {29},
	issue = {11},
	year = {2018},
	month = {11/2018},
	pages = {5592-5605},
	chapter = {5592},
	author = {Zambon, Daniele and Alippi, Cesare and Livi, Lorenzo}
}
@article {18536,
	title = {Credit Card Fraud Detection: A Realistic Modeling and a Novel Learning Strategy},
	journal = {IEEE Transactions on Neural Networks and Learning Systems},
	year = {2018},
	pages = {1-14},
	keywords = {Amplitude modulation, Area measurement, Companies, Concept drift, Credit card fraud detection, Credit cards, learning in nonstationary environments, Learning systems, Tools, Training, unbalanced classification.},
	issn = {2162-237X},
	doi = {10.1109/TNNLS.2017.2736643},
	author = {Dal Pozzolo, Andrea and Boracchi, Giacomo and Caelen, Olivier and Alippi, Cesare and Bontempi, Gianluca}
}
@article {18533,
	title = {Determination of the Edge of Criticality in Echo State Networks Through Fisher Information Maximization},
	journal = {IEEE Transactions on Neural Networks and Learning Systems},
	volume = {29},
	year = {2018},
	month = {March},
	pages = {706-717},
	keywords = {Echo state network (ESN), echo state networks, edge of criticality, ESN, Fisher information, Fisher information matrix, Fisher information maximization, Jacobian matrices, Learning systems, Neurons, nonparametric estimation, nonparametric estimator, nonparametric statistics, prediction error, Probability density function, recurrent neural nets, recurrent neural networks, Reservoirs, RNN, short-term memory capacity, Training},
	issn = {2162-237X},
	doi = {10.1109/TNNLS.2016.2644268},
	author = {Livi, Lorenzo and Bianchi, Filippo Maria and Alippi, Cesare}
}
@conference {18574,
	title = {Inverse Gating for Low Energy Block Ciphers},
	booktitle = {Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust (HOST)},
	year = {2018},
	author = {Banik, Subhadeep and Bogdanov, Andrey and Isobe, Takanori and Hiwatari, Harunaga and Akishita, Toru and Regazzoni, Francesco}
}
@article {18508,
	title = {Investigating echo state networks dynamics by means of recurrence analysis},
	journal = {IEEE Transactions on Neural Networks and Learning Systems},
	volume = {29},
	year = {2018},
	month = {02/2018},
	pages = { 427 - 439},
	abstract = {In this paper, we elaborate over the well-known
interpretability issue in echo state networks. The idea is to investigate
the dynamics of reservoir neurons with time-series analysis
techniques taken from research on complex systems. Notably, we
analyze time-series of neuron activations with Recurrence Plots
(RPs) and Recurrence Quantification Analysis (RQA), which
permit to visualize and characterize high-dimensional dynamical
systems. We show that this approach is useful in a number of
ways. First, the two-dimensional representation offered by RPs
provides a way for visualizing the high-dimensional dynamics of
a reservoir. Our results suggest that, if the network is stable,
reservoir and input denote similar line patterns in the respective
RPs. Conversely, the more unstable the ESN, the more the RP
of the reservoir presents instability patterns. As a second result,
we show that the Lmax measure is highly correlated with the
well-established maximal local Lyapunov exponent. This suggests
that complexity measures based on RP diagonal lines distribution
provide a valuable tool to quantify the degree of network stability.
Finally, our analysis shows that all RQA measures fluctuate on
the proximity of the so-called edge of stability, where an ESN
typically achieves maximum computational capability. We verify
that the determination of the edge of stability provided by such
RQA measures is more accurate than two well-known criteria
based on the Jacobian matrix of the reservoir. Therefore, we
claim that RPs and RQA-based analyses can be used as valuable
tools to design an effective network given a specific problem.},
	doi = {10.1109/TNNLS.2016.2630802},
	author = {Bianchi, Filippo Maria and Livi, Lorenzo and Alippi, Cesare}
}
@conference {18546,
	title = {Moving Convolutional Neural Networks to Embedded Systems: The Alexnet and VGG-16 Case},
	booktitle = {Proceedings of the 17th ACM/IEEE International Conference on Information Processing in Sensor Networks},
	year = {2018},
	publisher = {IEEE Press},
	organization = {IEEE Press},
	address = {Piscataway, NJ, USA},
	keywords = {approximate computing, convolutional neural networks, deep learning, embedded systems},
	isbn = {978-1-5386-5298-5},
	doi = {10.1109/IPSN.2018.00049},
	url = {https://doi.org/10.1109/IPSN.2018.00049},
	author = {Alippi, Cesare and Disabato, Simone and Roveri, Manuel}
}
@article {18512,
	title = {A Pdf-free Change Detection Test Based on Density Difference Estimation},
	journal = {IEEE Transactions on Neural Networks and Learning Systems},
	volume = {29},
	issue = {2},
	year = {2018},
	month = {11/2016},
	pages = { 324 - 334},
	chapter = {324},
	abstract = {The ability to detect 1 online changes in stationarity or time variance in a data stream is a hot research topic with striking implications. In this paper, we propose a novel probability density function-free change detection test, which is based on the least squares density-difference estimation method and operates online on multidimensional inputs. The test does not require any assumption about the underlying data distribution, and is able to operate immediately after having been configured by adopting a reservoir sampling mechanism. Thresholds requested to detect a change are automatically derived once a false positive rate is set by the application designer. Comprehensive experiments validate the effectiveness in detection of the proposed method both in terms of detection promptness and accuracy.},
	doi = {10.1109/TNNLS.2016.2619909},
	author = {Bo, Li and Alippi, Cesare and Zhao, Dongbin}
}
@conference {18584,
	title = {Security: The Dark Side of Approximate Computing?},
	booktitle = {Proceedings of the International Conference on Computer-Aided Design},
	year = {2018},
	month = {11/2018},
	publisher = {ACM},
	organization = {ACM},
	address = {New York, NY, USA},
	isbn = {978-1-4503-5950-4},
	doi = {10.1145/3240765.3243497},
	url = {http://doi.acm.org/10.1145/3240765.3243497},
	author = {Regazzoni, Francesco and Alippi, Cesare and Polian, Ilia}
}
@conference {18538,
	title = {Critical echo state network dynamics by means of Fisher information maximization},
	booktitle = {2017 International Joint Conference on Neural Networks (IJCNN)},
	year = {2017},
	month = {May},
	keywords = {Asymptotic stability, critical phase transitions, echo state network, edge of criticality, Electronic mail, ESN, Estimation, estimation theory, FIM, Fisher information matrix, Fisher information maximization, hidden neurons activations, high short term memory capacity, input signal, low prediction error, network dynamics, network theory (graphs), Neurons, optimisation, Probability density function, recurrent neural nets, Reservoirs, signal processing, statistics, Tuning, unsupervised approach, unsupervised learning},
	doi = {10.1109/IJCNN.2017.7965941},
	author = {Bianchi, Filippo Maria and Livi, Lorenzo and Jenssen, Robert and Alippi, Cesare}
}
@conference {18539,
	title = {Detecting changes at the sensor level in cyber-physical systems: Methodology and technological implementation},
	booktitle = {2017 International Joint Conference on Neural Networks (IJCNN)},
	year = {2017},
	month = {May},
	keywords = {actuators, adaptation mechanisms, adaptive systems, Change detection, change-point method, Computational modeling, cyber-physical systems, datastreams, fault detection and diagnosis, fault tolerant computing, ICI-based change detection test, Intelligence for Embedded and Cyber-physical Systems, Mann-Whitney change-point method, Mathematical model, model-free change detection test, Predictive models, Random variables, self-adaptive CPS, self-adaptive cyber-physical systems, self-configuration, self-healing skills, self-management, sensor acquisitions, sensor level, sensors, signal detection, Smart Sensor Networks, ST STM32 Nucleo platform, time-variant environments, Training},
	doi = {10.1109/IJCNN.2017.7966066},
	author = {Alippi, Cesare and D{\textquoteright}Alto, Viviana and Falchetto, Mirko and Pau, Danilo and Roveri, Manuel}
}
@conference {18542,
	title = {Detecting changes in sequences of attributed graphs},
	booktitle = {2017 IEEE Symposium Series on Computational Intelligence (SSCI)},
	year = {2017},
	month = {Nov},
	keywords = {Aerospace electronics, Anomaly detection, application domains, Attributed graph, attributed graphs, Change detection, Concept drift, Dynamic/Evolving graph, Electronic mail, Embedding, geometric graphs, Graph matching, graph theory, graph-based representations, Markov chains, Markov processes, Microsoft Windows, pair-wise relations, Prototypes, real-world systems, Stationarity, topology, Training, variable order},
	doi = {10.1109/SSCI.2017.8285273},
	author = {Zambon, Daniele and Livi, Lorenzo and Alippi, Cesare}
}
@article {18535,
	title = {An Incremental Change Detection Test Based on Density Difference Estimation},
	journal = {IEEE Transactions on Systems, Man, and Cybernetics: Systems},
	volume = {47},
	year = {2017},
	month = {Oct},
	pages = {2714-2726},
	keywords = {Big data framework, Change detection, change detection method, density difference estimation, Estimation, false positive rates, Feature extraction, Histograms, incremental change detection test, incremental computing, incremental least squares density difference change detection method (LSDD-Inc), Internet of Things, Kernel, least squares approximations, least squares density difference, linear combination, LSDD, LSDD values, nonoverlapping data windows, probability, Probability density function, probability density function (pdf)-free, probability density functions, process continuous data streams, Training},
	issn = {2168-2216},
	doi = {10.1109/TSMC.2017.2682502},
	author = {Bu, Li and Zhao, Dongbin and Alippi, Cesare}
}
@article {18540,
	title = {A Kolmogorov-Smirnov Test to Detect Changes in Stationarity in Big Data},
	journal = {IFAC-PapersOnLine},
	volume = {50},
	year = {2017},
	pages = {14260 - 14265},
	abstract = {The paper proposes an effective change detection test for online monitoring data streams by inspecting the least squares density difference (LSDD) features extracted from two non-overlapped windows. The first window contains samples associated with the pre-change probability distribution function (pdf) and the second one with the post-change one (that differs from the former if a change in stationarity occurs). This method can detect changes by also controlling the false positive rate. However, since the window sizes is fixed after the test has been configured (it has to be small to reduce the execution time), the method may fail to detect changes with small magnitude which need more samples to reach the requested level of confidence. In this paper, we extend our work to the Big Data framework by applying the Kolmogorov-Smirnov test (KS test) to infer changes. Experiments show that the proposed method is effective in detecting changes.},
	keywords = {change detection test, KS test, LSDD},
	issn = {2405-8963},
	doi = {https://doi.org/10.1016/j.ifacol.2017.08.1821},
	url = {http://www.sciencedirect.com/science/article/pii/S2405896317324436},
	author = {Zhao, Dongbin and Bu, Li and Alippi, Cesare and Wei, Qinglai}
}
@conference {18541,
	title = {Learning in Nonstationary Environments: A Hybrid Approach},
	booktitle = {Artificial Intelligence and Soft Computing},
	year = {2017},
	publisher = {Springer International Publishing},
	organization = {Springer International Publishing},
	address = {Cham},
	abstract = {Solutions present in the literature to learn in nonstationary environments can be grouped into two main families: passive and active. Passive solutions rely on a continuous adaptation of the envisaged learning system, while the active ones trigger the adaptation only when needed. Passive and active solutions are somehow complementary and one should be preferred than the other depending on the nonstationarity rate and the tolerable computational complexity. The aim of this paper is to introduce a novel hybrid approach that jointly uses an adaptation mechanism (as in passive solutions) and a change detection triggering the need to retrain the learning system (as in active solutions).},
	isbn = {978-3-319-59060-8},
	author = {Alippi, Cesare and Qi, Wen and Roveri, Manuel},
	editor = {Rutkowski, Leszek and Korytkowski, Marcin and Scherer, Rafa{\l} and Tadeusiewicz, Ryszard and Zadeh, Lotfi A. and Zurada, Jacek M.}
}
@conference {18537,
	title = {A lightweight and energy-efficient Internet-of-birds tracking system},
	booktitle = {2017 IEEE International Conference on Pervasive Computing and Communications (PerCom)},
	year = {2017},
	month = {March},
	keywords = {animal movement tracking, application server, Birds, cellular radio, cloud computing, energy assessment, energy conservation, energy consumption, energy efficient Internet-of-birds tracking system, GSM, GSM-based tracking device energy consumption reduction, Internet of Things, Internet-of-things vision, joint localization-transmission phase, Northern Italy, quality of service, Radar tracking, Receivers, Satellites, telecommunication power management, Tracking, Transmitters},
	doi = {10.1109/PERCOM.2017.7917862},
	author = {Alippi, Cesare and Ambrosini, Roberto and Longoni, Violetta and Cogliati, Dario and Roveri, Manuel}
}
@article {18531,
	title = {Model-Free Fault Detection and Isolation in Large-Scale Cyber-Physical Systems},
	journal = {IEEE Transactions on Emerging Topics in Computational Intelligence},
	volume = {1},
	year = {2017},
	month = {Feb},
	pages = {61-71},
	keywords = {Change detection algorithms, clustering methods, Computational modeling, cyber-physical systems, Fault detection, Hidden Markov models, monitoring, Sensor phenomena and characterization, Sensor systems},
	doi = {10.1109/TETCI.2016.2641452},
	author = {Alippi, Cesare and Ntalampiras, Stavros and Roveri, Manuel}
}
@article {18532,
	title = {Multiplex visibility graphs to investigate recurrent neural network dynamics},
	journal = {Nature-Scientific reports},
	volume = {7},
	year = {2017},
	month = {03/2017},
	pages = {44037-44049},
	chapter = {44037},
	doi = {doi:10.1038/srep44037},
	author = {Bianchi, Filippo Maria and Livi, Lorenzo and Alippi, Cesare and Jenssen, Robert}
}
@article {18534,
	title = {The (Not) Far-Away Path to Smart Cyber-Physical Systems: An Information-Centric Framework},
	journal = {Computer},
	volume = {50},
	year = {2017},
	month = {April},
	pages = {38-47},
	keywords = {adaptive systems, autonomic computing, communication technologies, CPSs, cyber-physical systems, cybersecurity, embedded systems, Energy management, fault detection and diagnosis, Fault diagnosis, Green computing, homogeneous integrated framework, information-centric framework, intelligent functionalities, Intelligent sensors, Intelligent systems, Internet of Things, IoT, learning (artificial intelligence), low-cost sensors, security, smart cyber-physical systems, smart technology},
	issn = {0018-9162},
	doi = {10.1109/MC.2017.111},
	author = {Alippi, Cesare and Roveri, Manuel}
}
@article {18510,
	title = {One-class classifiers based on entropic spanning graphs},
	journal = {IEEE Transactions on Neural Networks and Learning Systems},
	volume = {28},
	issue = {12},
	year = {2017},
	month = {11/2016},
	pages = { 2846 - 2858},
	chapter = {2846},
	abstract = {One-class classifiers offer valuable tools to assess the presence of outliers in data. In this paper, we propose a design methodology for one-class classifiers based on entropic spanning graphs. The spanning graph is learned on the embedded input data, with the aim to generate a partition of the vertices.
The final partition is derived by exploiting a criterion based on mutual information minimization. Here, we compute the mutual information by using a convenient formulation provided in terms of the alfa-Jensen difference. Once training is completed, in order to associate a confidence level with the classifier decision, a graph-based fuzzy model is constructed. The fuzzification process is based only on topological information of the vertices of the entropic spanning graph. As such, the proposed one-class classifier is suitable also for datasets with complex geometric structures. We provide experiments on well-known benchmarking datasets containing both feature vectors and labeled graphs. In addition, we apply the method on the problem of protein solubility recognition by considering several data representations for the samples. Experimental results demonstrate the effectiveness and versatility of the proposed method with respect to other state-of the-art approaches.
},
	doi = { 10.1109/TNNLS.2016.2608983},
	author = {Livi, Lorenzo and Alippi, Cesare}
}
@article {18509,
	title = {Solving Multiobjective Optimization Problems in Unknown Dynamic Environments: An Inverse Modeling Approach},
	journal = {IEEE Transactions on Cybernetics},
	volume = {47},
	issue = {12},
	year = {2017},
	month = {11/2016},
	pages = {4223 - 4234},
	chapter = {4223},
	abstract = {Evolutionary multiobjective optimization in dynamic environments is a challenging task, as it requires the optimization algorithm converging to a time-variant Pareto optimal front. This paper proposes a dynamic multiobjective optimization algorithm which utilizes an inverse model set to guide the search towards promising decision regions. In order to reduce the number of fitness evaluations for change detection purpose, a two stage change detection test is proposed which uses the inverse model set to check potential changes in the objective function landscape. Both static and dynamic multiobjective benchmark optimization problems have been considered to evaluate the performance of the proposed algorithm. Experimental results show that the improvement in optimization performance is achievable when the proposed inverse model set is adopted.},
	doi = {10.1109/TCYB.2016.2602561},
	author = {Gee, Sen Bong and Tan, Kay Chen and Alippi, Cesare}
}
@proceedings {18514,
	title = {CCM: Controlling the Change Magnitude in High Dimensional Data},
	journal = {In Proceedings of the 2nd INNS Conference on Big Data 2016 (INNS Big Data 2016)},
	year = {2016},
	month = {10/2016},
	pages = {1-10},
	address = {Thessaloniki, Greece},
	abstract = {Change-detection algorithms are often tested on real-world datasets where changes are synthetically introduced. While this common practice allows generating multiple datasets to obtain stable performance measures, it is often quite arbitrary since the change magnitude is seldom controlled. Thus, experiments { in particular those on multivariate and high-dimensional data. We here present a rigorous framework for introducing changes having a controlled magnitude in multivariate datasets. In particular, we introduce changes by directly roto-translating the data, and we measure the change magnitude by the symmetric
Kullback-Leibler divergence between pre- ad post-change distributions. We present an iterative algorithm that identities the roto-translation parameters yielding the desired change magnitude, and we prove its convergence analytically. We also illustrate our MATLAB framework that introduces changes having a controlled magnitude in real-world datasets, which is made publicly available for download.
},
	author = {Alippi, Cesare and Boracchi, Giacomo and Carrera, Diego}
}
@conference {18447,
	title = {Change Detection in Multivariate Datastreams: Likelihood and  Detectability Loss},
	booktitle = {25th International Joint Conference on Artificial Intelligence (IJCAI-16)},
	year = {2016},
	month = {07/2016},
	address = { New York, USA},
	abstract = {We address the problem of detecting changes in multivariate datastreams, and we investigate the intrinsic difficulty that change-detection methods have to face when the data-dimension scales. In particular, we consider the general approach that detects changes by comparing the distribution of the log-likelihood of the datastream over different time windows. Despite the fact that this approach constitutes the frame for several change-detection methods, its effectiveness when the dimension of data scales has never been investigated, which is indeed the goal of our paper. We show that the magnitude of the change can be naturally measured by the symmetric Kullback-Leibler divergence between the pre- and post-change distributions, and that the detectability of a change of a given magnitude worsens when the data-dimension increases. This structural problem, which we refer to as detectability loss, is due to the linear relationship existing between the variance of the log-likelihood and the data dimension, and reveals to be harmful even at low data-dimensions (say, 10). We analytically derive the detectability loss on Gaussian-distributed datastreams, and empirically demonstrate that this problem holds also on real-world datasets.},
	author = {Alippi, Cesare and Boracchi, Giacomo and Carrera, Diego and Roveri, Manuel}
}
@article {18511,
	title = {A Cloud to the Ground: The New Frontier of Intelligent and Autonomous Networks of Things},
	journal = {IEEE Communication Magazine},
	volume = {54},
	issue = {12},
	year = {2016},
	month = {11/2016},
	pages = {14 - 20},
	chapter = {14},
	abstract = {The Internet-of-Things (IoT) paradigm is supporting -and will support- an ever-increasing number of services and applications impacting on almost every aspect of our everyday life. The current trend is forecasting IoT to connect tens of billion objects by 2020 yielding a very-high volume of data to be acquired, transmitted and processed. IoT typically relies on Cloud Computing to process, analyze and store the data acquired by IoT entities. Unfortunately, the need to transmit all data from the information producing objects to the Cloud for a subsequent processing/analysis phase would require a large bandwidth and increase the latency in the {\textquotedblleft}decision-making process{\textquotedblright} whenever decisions/reactions must be promptly taken by the IoT units.
The Fog Computing (FC) paradigm aims at addressing these problems by extending Cloud Computing towards the edge of the network. In this direction, this paper introduces a novel FC-IoT paradigm designed
to move computing, storage and applications/services close to IoT objects so as to reduce communication bandwidth and energy consumption as well as {\textquotedblleft}decision-making{\textquotedblright} latency. The proposed IoT-based solution has been designed to have intelligent and autonomous IoT objects that are integrated with a FC and Fog Networking approach. The distinguishing features of the intelligent FC-IoT platform are low-latency, self-adaptation, low energy consumption and spectrum efficiency.
},
	doi = { 10.1109/MCOM.2016.1600541CM},
	author = {Alippi, Cesare and Fantacci, Romano and Marabissi, Dania and Roveri, Manuel}
}
@conference {18449,
	title = {Ensemble LSDD-based Change Detection Tests},
	booktitle = {IEEE-INNS  International Joint Conference on Neural Networks (IJCNN16)},
	year = {2016},
	month = {07/2016},
	address = {Vancouver, Canada},
	abstract = {The least squares density difference change detection test (LSDD-CDT) has proven to be an effective method in detecting concept drift by inspecting features derived from the discrepancy between two probability density functions (pdfs). The first pdf is associated with the concept drift free case, the second to the possible post change one. Interestingly, the method permits to control the ratio of false positives. This paper introduces and investigates the performance of a family of LSDD methods constructed by exploring different ensemble options applied to the basic CDT procedure. Experiments show that most of proposed methods are characterized by improved performance in change detection once compared with the direct ensemble-free counterpart.},
	author = {Bu, Li and Alippi, Cesare and Zhao, Dongbin}
}
@conference {18513,
	title = {An improved Hilbert-Huang Transform for non-linear and time-variant signals},
	booktitle = {26th Italian Workshop on Neural Networks (WIRN 2016)},
	year = {2016},
	month = {05/2016},
	pages = {1-8},
	address = {Vietri sul Mare, Salerno, Italy},
	abstract = {Learning in non-stationary/evolving environments requires methods able to process and deal with non-stationary streams. In this paper we propose a novel algorithm providing a time-frequency decomposition
of time-variant signals. Outcoming signals can be used to identify anomalous events/patterns or extract features associated with the time variance of the signal, precious information for any consequent learning
action. The paper extends the Hilbert-Huang Transform notoriously used to deal with time-variant signals by introducing (i) a new Empirical Mode Decomposition that identies the number of frequency modes of
the signal and (ii) an extension of the Hilbert Transform that eliminates negative frequency-values in the time-frequency spectrum. The effectiveness of the proposed Transform has been tested on both synthetic and real time-variant signals acquired by a real-world intelligent system for landslide monitoring.
},
	author = {Alippi, Cesare and Wen, Qi and Roveri, Manuel}
}
@article {18543,
	title = {Model Complexity, Regularization, and Sparsity [Guest Editorial]},
	year = {2016},
	keywords = {Adaptation models, Computational complexity, machine learning, Sparse matrices, Special issues and sections},
	doi = {10.1109/MCI.2016.2602071},
	author = {Alippi, Cesare and Boracchi, Giacomo and Wohlberg, Brendt}
}
@conference {18448,
	title = {One-Class Classification Through Mutual Information Minimization},
	booktitle = {IEEE-INNS  International Joint Conference on Neural Networks (IJCNN16)},
	year = {2016},
	month = {07/2016},
	address = {Vancouver, Canada},
	abstract = {In one-class classification problems, a model is synthesized by using only information coming from the nominal state of the data generating process. Many important applications can be cast in the one-class classification framework, such as anomaly and change in stationarity detection, and fault recognition. In this paper, we present a novel design methodology for oneclass classifiers derived from graph-based entropy estimators. The entropic graph is used to generate a partition of the input nominal conditions, which corresponds to the classifier model. Here we propose a criterion based on mutual information minimization to learn such a partition. The _-Jensen difference is considered, which provides a convenient way for estimating the mutual information. The classifier incorporates also a fuzzy model, providing a confidence value for a generic test sample during operational modality, expressed as a membership degree of the sample to the nominal conditions class. The fuzzification mechanism is based only on topological properties of the entropic spanning graph vertices; as such, it allows to model clusters of arbitrary shapes. We show preliminary {\textendash} yet very promising {\textendash} results on both synthetic problems and real-world datasets for one-class classification.
},
	author = {Livi, Lorenzo and Alippi, Cesare}
}
@conference {18450,
	title = {Online Model-free Sensor Fault Identification and Dictionary Learning in Cyber-Physical Systems},
	booktitle = {IEEE-INNS  International Joint Conference on Neural Networks (IJCNN16)},
	year = {2016},
	month = {07/2016},
	address = {Vancouver, Canada},
	abstract = {This paper presents a model-free method for the online identification of sensor faults and learning of their fault dictionary. The method, designed having in mind Cyber-Physical Systems (CPSs), takes advantage of functional relationships among the datastreams acquired by CPS sensing units. Existing model-free change detection mechanisms are proposed to detect faults and identify the fault type thanks to a fault dictionary
which is built over time. The main features of the proposed algorithm are its ability to operate without requiring any a priori information about the system under inspection or the nature of the possibly occurring faults. As such, the method follows the model-free approach, characterized by the fact the fault dictionary
is constructed online once faults are detected. Whenever available, humans can be considered in the loop to label a fault or a fault class in the dictionary as well as introduce fault instances generated thanks to a priori information. Experimental results on both synthetic and real datasets corroborate the effectiveness of the proposed fault diagnosis system.
},
	author = {Alippi, Cesare and Ntalampiras, Stavros and Roveri, Manuel}
}
@conference {18484,
	title = {Round gating for low energy block ciphers},
	booktitle = {2016 IEEE International Symposium on Hardware Oriented Security and Trust, HOST},
	year = {2016},
	month = {05/2016},
	pages = {55-60},
	publisher = {IEEE Computer Society},
	organization = {IEEE Computer Society},
	address = {McLean, VA, USA},
	abstract = {Pushed by the pervasive diffusion of devices operated by battery or by the energy harvested, energy has become one of the most important parameter to be optimized for embedded systems. Particularly relevant would be to optimize the energy consumption of security primitives. In this paper we explore design techniques for implementing block ciphers in a low energy fashion. We concentrate on round based implementation and we discuss how gating, applied at round level can affect and improve the energy consumption of the most common lightweight block cipher currently used in the internet of things. Additionally, we discuss how to needed gating wave can be generated. Experimental results show that our technique is able to reduce the energy consumption in most block ciphers by over 60\% while incurring only a minimal overhead in hardware},
	keywords = {algorithm design and analysis, ciphers, clocks, computer architecture, energy consumption},
	isbn = {978-1-4673-8826-9},
	doi = {10.1109/HST.2016.7495556},
	url = {http://dx.doi.org/10.1109/HST.2016.7495556},
	author = {Banik, Subhadeep and Bogdanov, Andrey and Regazzoni, Francesco and Isobe, Takanori and Hiwatari, Harunaga and Akishita, Toru}
}
@conference {18489,
	title = {Secure architectures of future emerging cryptography},
	booktitle = {International Conference on Computing Frontiers CF{\textquoteright}16},
	series = {Proceedings of the ACM International Conference on Computing Frontiers},
	year = {2016},
	month = {05/2016},
	pages = {315-322},
	publisher = {ACM New York},
	organization = {ACM New York},
	address = {Como, italy},
	abstract = {Funded under the European Union{\textquoteright}s Horizon 2020 research and innovation programme, SAFEcrypto will provide a new generation of practical, robust and physically secure post-quantum cryptographic solutions that ensure long-term security for future ICT systems, services and applications. The project will focus on the remarkably versatile field of Lattice-based cryptography as the source of computational hardness, and will deliver optimised public key security primitives for digital signatures and authentication, as well identity based encryption (IBE) and attribute based encryption (ABE). This will involve algorithmic and design optimisations, and implementations of lattice-based cryptographic schemes addressing cost, energy consumption, performance and physical robustness. As the National Institute of Standards and Technology (NIST) prepares for the transition to a post-quantum cryptographic suite B, urging organisations that build systems and infrastructures that require long-term security to consider this transition in architectural designs; the SAFEcrypto project will provide Proof-of-concept demonstrators of schemes for three practical real-world case studies with long-term security requirements, in the application areas of satellite communications, network security and cloud. The goal is to affirm Lattice-based cryptography as an effective replacement for traditional number-theoretic public-key cryptography, by demonstrating that it can address the needs of resource-constrained embedded applications, such as mobile and battery-operated devices, and of real-time high performance applications for cloud and network management infrastructures},
	keywords = {identity based encryption, lattice-based cryptography, physical attacks, public-key cryptography},
	isbn = {978-1-4503-4128-8},
	doi = {10.1145/2903150.2907756},
	url = {http://doi.acm.org/10.1145/2903150.2907756},
	author = {O{\textquoteright}Neill, Maire and O{\textquoteright}Sullivan, Elizabeth and McWilliams, Gavin and Saarinen, Markku-Juhani and Moore, Ciara and Khalid, Ayesha and Howe, James and Del Pino, Rafael and Abdalla, Michel and Regazzoni, Francesco and Valencia, Andres Felipe and G{\"u}neysu, Tim and Oder, Tobias and Waller, Adrian and Jones, Glyn and Barnett, Anthony and Griffin, Robert and Byrne, Andrew and Ammar, Bassem and Lund, David}
}
@conference {18490,
	title = {Topology Optimization of Wireless Localization Networks},
	booktitle = {European Wireless 2016 },
	year = {2016},
	month = {05/2016},
	address = {Oulu, Finland},
	abstract = {This paper addresses topology optimization problem for an ultra wide band (UWB) localization network, where trilateration is used to obtain the target position based on its distances from fixed and known anchors. Our goal is to minimize the number of anchors needed to localize a target, while keeping the localization uncertainty lower than a given threshold in an area of arbitrary shape with obstacles. Our propagation model accounts for the presence of line of sight (LOS) between nodes, while geometric dilution of precision (GDoP) is used to express the localization error introduced by trilateration. We propose two integer linear programming formulations to solve the problem. To handle the problems of large sizes, we use the greedy placement with pruning heuristic. We test our solutions through simulation and show that the integer linear programming is appropriate to handle reasonably sized problems, and the heuristic achieves the results, in terms of the number of anchors placed, within less
than 2\% of optimum on average.
},
	keywords = {localization network, propagation model, topology optimization, ultra wide band, wireless protocols, wireless sensor networks},
	author = {Bala{\'c}, Katarina and Akhmedov, Murodzhon and Prevostini, Mauro and Malek, Miroslaw}
}
@conference {18483,
	title = {Midori: A Block Cipher for Low Energy},
	booktitle = {21st International Conference on the Theory and Application of Cryptology and Information Security ASIACRYPT 2015},
	series = {Lecture Notes in Computer Science},
	volume = {9453},
	year = {2015},
	month = {11/2015},
	pages = {411-436},
	publisher = {Springer Berlin Heidelberg},
	organization = {Springer Berlin Heidelberg},
	address = {Auckland, New Zealand},
	abstract = {In the past few years, lightweight cryptography has become a popular research discipline with a number of ciphers and hash functions proposed. The designers{\textquoteright} focus has been predominantly to minimize the hardware area, while other goals such as low latency have been addressed rather recently only. However, the optimization goal of low energy for block cipher design has not been explicitly addressed so far. At the same time, it is a crucial measure of goodness for an algorithm. Indeed, a cipher optimized with respect to energy has wide applications, especially in constrained environments running on a tight power/energy budget such as medical implants.

This paper presents the block cipher Midori (The name of the cipher is the Japanese translation for the word Green.) that is optimized with respect to the energy consumed by the circuit per bt in encryption or decryption operation. We deliberate on the design choices that lead to low energy consumption in an electrical circuit, and try to optimize each component of the circuit as well as its entire architecture for energy. An added motivation is to make both encryption and decryption functionalities available by small tweak in the circuit that would not incur significant area or energy overheads. We propose two energy-efficient block ciphers Midori128 and Midori64 with block sizes equal to 128 and 64 bits respectively. These ciphers have the added property that a circuit that provides both the functionalities of encryption and decryption can be designed with very little overhead in terms of area and energy. We compare our results with other ciphers with similar characteristics: it was found that the energy consumptions of Midori64  and Midori128  are by far better when compared ciphers like PRINCE and NOEKEON.
},
	keywords = {lightweight block cipher, low energy circuits},
	isbn = {978-3-662-48799-0},
	issn = {0302-9743},
	doi = {10.1007/978-3-662-48800-3_17},
	url = {http://dx.doi.org/10.1007/978-3-662-48800-3_17},
	author = {Banik, Subhadeep and Bogdanov, Andrey and Isobe, Takanori and Shibutani, Kyoji and Hiwatari, Harunaga and Akishita, Toru and Regazzoni, Francesco}
}
@article {18472,
	title = {Midori: (A) Block Cipher for Low Energy (Extended Version)},
	journal = {(IACR) Cryptology ePrint Archive},
	volume = {2015},
	year = {2015},
	month = {12/2015},
	chapter = {1142},
	abstract = {In the past few years, lightweight cryptography has become a popular research discipline with a number of ciphers and hash functions proposed. The designers{\textquoteright} focus has been predominantly to minimize the hardware area, while other goals such as low latency have been addressed rather recently only. However, the optimization goal of low energy for block cipher design has not been explicitly addressed so far. At the same time, it is a crucial measure of goodness for an algorithm. Indeed, a cipher optimized with respect to energy has wide applications, especially in constrained environments running on a tight power/energy budget such as medical implants. 

This paper presents the block cipher Midori that is optimized with respect to the energy consumed by the circuit per bit in encryption or decryption operation. We deliberate on the design choices that lead to low energy consumption in an electrical circuit, and try to optimize each component of the circuit as well as its entire architecture for energy. An added motivation is to make both encryption and decryption functionalities available by small tweak in the circuit that would not incur significant area or energy overheads. 

We propose two energy-efficient block ciphers Midori128 and Midori64 with block sizes equal to 128 and 64 bits respectively. These ciphers have the added property that a circuit that provides both the functionalities of encryption and decryption can be designed with very little overhead in terms of area and energy. We compare our results with other ciphers with similar characteristics: it was found that the energy consumptions of Midori64 and Midori128 are by far better when compared ciphers like PRINCE and NOEKEON. 
},
	keywords = {AES, lightweight block cipher, low energy circuits, secret-key cryptography},
	url = {http://eprint.iacr.org/2015/1142},
	author = {Regazzoni, Francesco and Banik, Subhadeep and Bogdanov, Andrey and Isobe, Takanori and Shibutani, Kyoji and Hiwatari, Harunaga and Akishita, Toru}
}
@conference {18469,
	title = {Accelerating differential power analysis on heterogeneous systems},
	booktitle = {The 9th Workshop on Embedded Systems Security (WESS) 2014},
	year = {2014},
	month = {10/2014},
	publisher = {ACM},
	organization = {ACM},
	address = {New Delhi, India},
	abstract = {Differential Power Analysis (DPA) attacks allows discovering the secret key stored into secure embedded systems by exploiting the correlation between the power consumed by a device and the data being processed. The computation involved is generally relatively simple, however, if the used power traces are composed by a large number of points, the processing time can be long. In this paper we aim at speeding up the so called correlation power analysis (CPA). To do so, we used the OpenCL framework to distribute the workload of the attack over an heterogeneous platform composed by a CPU and multiple accelerators. We concentrate in the computation of the Pearson{\textquoteright}s correlation coefficients, as they cover approximately 80\% of the overall execution time, and we further optimize the attack by minimizing the data transfers between the host processor and the GPUs. Our results show performance improvements of up to 9x when compared with the reference parallel implementation},
	keywords = {heterogeneous systems, power analysis},
	isbn = {978-1-4503-2932-3},
	doi = {10.1145/2668322.2668326},
	url = {http://doi.acm.org/10.1145/2668322.2668326},
	author = {Amaral, Joao and Regazzoni, Francesco and Tomas, Pedro and Chaves, Ricardo}
}
@conference {18227,
	title = {Risk Assessment of Atrial Fibrillation: a Failure Prediction Approach},
	booktitle = {41st Computing in Cardiology Conference (CinC)},
	year = {2014},
	month = {09/2014},
	publisher = {IEEE Computer Society},
	organization = {IEEE Computer Society},
	address = {Cambridge, MA, USA},
	abstract = {We present a methodology for identifying patients who have experienced Paroxysmal Atrial Fibrillation (PAF) among a given subjects population. Our work is intended as an initial step towards the design of an unobtrusive system for concurrent detection and monitoring of chronic cardiac conditions.

Our methodology comprises two stages: off-line training and on-line analysis. During training the most significant features are selected using machine-learning methods, without relying on a manual selection based on previous knowledge. Analysis is based on two phases: feature extraction and detection of PAF patients. Light-weight algorithms are employed in the feature extraction phase, allowing the on-line implementation of this step on wearable and resource-constrained sensor nodes. The detection phase employs techniques borrowed from the field of failure prediction. While these algorithms have found extensive applications in diverse scenarios, their application to automated cardiac analysis has not been sufficiently investigated.

Obtained results, in terms of performance, are comparable to similar efforts in the field. Nonetheless, the proposed method employs computationally simpler and more efficient algorithms, which are compatible with the computational constraints of state-of-the-art body sensor nodes.},
	url = {http://andreas-dittrich.eu/2014/06/risk-assessment-of-atrial-fibrillation-a-failure-prediction-approach},
	author = {Milosevic, Jelena and Dittrich, Andreas and Ferrante, Alberto and Malek, Miroslaw and Rojas Quiros, Camilo and Braojos, Rub{\'e}n and Ansaloni, Giovanni and Atienza, David}
}
@inbook {141.aetherinbook.2011,
	title = {AETHER: Self-Adaptive Networked Entities: Autonomous Computing Elements for Future Pervasive Applications and Technologies},
	booktitle = {Reconfigurable Computing: From FPGAs to Hardware/Software Codesign},
	year = {2011},
	pages = {149{\textendash}184},
	publisher = {Springer},
	organization = {Springer},
	address = {New York, USA},
	abstract = {The AETHER project has laid the foundation of a complete new framework for designing and programming computing resources that live in changing environments and need to re-configure their objectives in a dynamic way. This chapter contributes to a strategic research agenda in the field of self-adaptive computing systems. It brings inputs to the reconfigurable hardware community and proposes directions to go for reconfigurable hardware and research on self-adaptive computing; it tries to identify some of the most promising future technologies for reconfiguration, while pointing out the main foreseen Challenges for reconfigurable hardware. This chapter presents the main solutions the AETHER project proposed for some of the major concerns in trying to engineer a self-adaptive computing system. The text exposes the AETHER vision of self-adaptation and its requirements. It describes and discusses the proposed solutions for tackling self-adaptivity at the various levels of abstractions. It exposes how the developed technologies could be put together in a real methodology and how self-adaptation could then be used in potential applications. Finally and based on lessons learned from AETHER, we discuss open issues and research opportunities and put those in perspective along other investigations and roadmaps.},
	isbn = {978-1-4614-0061-5},
	author = {Gamrat, Christian and Philippe, Jean-Marc and Jesshope, Chris and Shafarenko, Alex and Bisdounis, Labros and Bondi, Umberto and Ferrante, Alberto and Cabestany, Joan and Huebner, Michael and Parsinnen, Juha and Kadlec, Jiri and Danek, Martin and Tain, Benoit and Eisenbach, Susan and Auguin, Michel and Diguet, Jean-Philippe and Lenormand, Eric and Roux, Jean-Luc},
	editor = {Cardoso, Joao Manuel Pai and Huebner, Michael}
}
@conference {152.KrLeAhPoLi11.SiPS,
	title = {Beamforming for interference mitigation and its implementation on an SDR baseband processor},
	booktitle = {SiPS{\textquoteright}11: Proceedings of the IEEE Workshop on Signal Processing Systems},
	year = {2011},
	month = {October 4-7},
	pages = {1{\textendash}6},
	address = {Beirut, Lebanon},
	abstract = {We present the first implementation of a distributed beamforming algorithm for interference mitigation on an SDR baseband processor. Co-channel interference (CCI) is becoming a major source of impairments in wireless communications and distributed beamforming is a promising technique to mitigate its negative impact. However, such schemes are challenging to implement in practical scenarios due to their complexity and synchronization requirements. In this paper, we report on implementation of a suboptimal, yet efficient, beamforming scheme for CCI mitigation and present the complexity modeling and algorithm transformations for achieving numerically stability. We also present the fixed-point quantization and the proper mapping on a parallel programmable baseband architecture aimed for software-defined radio (SDR). We optimize this algorithm for a coarse grained reconfigurable array (CGRA) processor and evaluate it in the context of the LTE standard.},
	keywords = {beamforming, coarse grained reconfigurable array (CGRA), fixed-point arithmetic, long term evolution (LTE), software defined radio (SDR)},
	doi = {http://dx.doi.org/10.1109/SiPS.2011.6088973},
	author = {Krdu, Adrian and Lebrun, Yann and Ahmad, Ubaid and Pollin, Sofie and Li, Min}
}
@inbook {18092,
	title = {Design Space Exploration for Run-Time Management of a Reconfigurable System for Video Streaming},
	booktitle = {Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach},
	year = {2011},
	pages = {189-204},
	publisher = {Springer},
	organization = {Springer},
	edition = {1},
	isbn = {978-1-4419-8836-2},
	author = {Mariani, Giovanni and Avasare, Prabhat and Ykman-Couvreur, Chantal and Vanmeerbeeck, Geert and Palermo, Gianluca and Silvano, Cristina and Zaccaria, Vittorio},
	editor = {Silvano, Cristina and Fornaciari, William and Villar, Eugenio}
}
@inbook {138.MaAvYkVaPaSiZa.2011,
	title = {Design Space Exploration of a Reconfigurable System for Supporting Video Streaming Run-time Management},
	booktitle = {Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach},
	year = {2011},
	publisher = {Springer},
	organization = {Springer},
	address = {New York, USA},
	abstract = {This paper reports a case study of Design Space Exploration for supporting Run-time Resource Management (RRM). In particular the management of system resources for an MPSoC dedicated to multiple MPEG4 encoding is addressed in the context of an Automotive Cognitive Safety System (ACSS). The runtime management problem is defined as the minimization of the platform power consumption under resource and Quality of Service (QoS) constraints. The paper provides an insight of both, design-time and run-time aspects of the problem. During the prelimiary design-time Design Space Exploration (DSE) phase, the best configurations of run-time tunable parameters are statically identified for providing the best trade-offs in terms of run-time costs and application QoS. To speed up the optimization process without reducing the quality of final results, a multi-simulator framework is used for modeling platform performance. At run-time, the RRM exploits the design-time DSE results for deciding an operating configuration to be loaded for each MPEG4 encoder. This operation is carried out dynamically, by following the QoS requirements of the specific use-case.},
	author = {Mariani, Giovanni and Avasare, Prabhat and Ykman-Couvreur, Chantal and Vanmeerbeeck, Geert and Palermo, Gianluca and Silvano, Cristina and Zaccaria, Vittorio}
}
@inbook {144.AvYkVaMaPaSiZa.2011,
	title = {Design Space Exploration Supporting Run-time Resource Management},
	booktitle = {Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach},
	year = {2011},
	publisher = {Springer},
	organization = {Springer},
	address = {New York, USA},
	abstract = {Running multiple applications optimally in terms of Quality of Service (e.g., performance and power consumption) on embedded multi-core platforms is a huge challenge.Moreover, current applications exhibit unpredictable changes of the environment and workload conditions which makes the task of running them optimally even more difficult. This dynamic trend in application runs will grow even more in future applications. This paper presents an automated tool flow which tackles this challenge by a two-step approach: first at design-time, a Design Space Exploration (DSE) tool is coupled with a platform simulator(s) to get optimum operating points for the set of target applications. Secondly, at run-time, a lightweight Run-time Resource Manager (RRM) leverages the design-time DSE results for deciding an operating configuration to be loaded at run-time for each application. This decision is performed dynamically, by taking into consideration available platform resources and the QoS requirements of the specific use-case. To keep RRM execution and resource overhead at minimum, a very fast optimisation heuristic is integrated. Application of this tool-flow on a real-life multimedia use case (described in Chapter 9 of the book of this paper) will demonstrate a significant speedup in optimisation process while maintaining desired Quality of Service.},
	author = {Avasare, Prabhat and Ykman-Couvreur, Chantal and Vanmeerbeeck, Geert and Mariani, Giovanni and Palermo, Gianluca and Silvano, Cristina and Zaccaria, Vittorio}
}
@article {145.YkAvMaZaPaSi11,
	title = {Linking run-time resource management of embedded multi-core platforms with automated design-time exploration},
	journal = {IET Computers and Digital Techniques},
	volume = {5},
	number = {-},
	year = {2011},
	pages = {123{\textendash}135},
	abstract = {Nowadays, owing to unpredictable changes of the environment and workload variation, optimally running multiple applications in terms of quality, performance and power consumption on embedded multi-core platforms is a huge challenge. A lightweight run-time manager, linked with an automated design-time exploration and incorporated in the host processor of the platform, is required to dynamically and efficiently configure the applications according to the available platform resources (e.g. processing elements, memories, communication bandwidth), for minimising the cost (e.g. power consumption), while satisfying the constraints (e.g. deadlines). This study presents a flow linking a design-time design space explorer, coupled with platform simulators at two abstraction levels, with a fast and lightweight priority-based heuristic integrated in the run-time manager to select near-optimal application configurations. To illustrate its feasibility and the very low complexity of the run-time selection, the proposed flow is used to manage the processors and clock frequencies of a multiple-stream MPEG4 encoder chip dedicated to automotive cognitive safety applications.},
	doi = {http://dx.doi.org/10.1049/iet-cdt.2010.0030},
	author = {Ykman-Couvreur, Chantal and Avasare, Prabhat and Mariani, Giovanni and Zaccaria, Vittorio and Palermo, Gianluca and Silvano, Cristina}
}
@inbook {17734,
	title = {The MULTICUBE Design Flow},
	booktitle = {Multi-objective Design Space Exploration of Multiprocessor SoC Architectures},
	year = {2011},
	pages = {3-17},
	publisher = {Springer New York},
	organization = {Springer New York},
	isbn = {978-1-4419-8836-2},
	doi = {10.1007/978-1-4419-8837-9_1},
	url = {http://dx.doi.org/10.1007/978-1-4419-8837-9_1},
	author = {Silvano, Cristina and Fornaciari, William and Palermo, Gianluca and Zaccaria, Vittorio and Castro, Fabrizio and Martinez, Marcos and Bocchio, Sara and Zafalon, Roberto and Avasare, Prabhat and Vanmeerbeeck, Geert and Ykman-Couvreur, Chantal and Wouters, Maryse and Kavka, Carlos and Onesti, Luka and Turco, Alessandro and Bondi, Umberto and Mariani, Giovanni and Posadas, Hector and Villar, Eugenio and Wu, Chris and Dongrui, Fan and Hao, Zhang},
	editor = {Silvano, Cristina and Fornaciari, William and Villar, Eugenio}
}
@inbook {139.Sietal2.2011,
	title = {MULTICUBE: Multi-Objective Design Space Exploration of Multi-Core Architectures},
	booktitle = {VLSI 2010 Annual Symposium},
	volume = {105},
	year = {2011},
	pages = {47-63},
	publisher = {Springer},
	organization = {Springer},
	address = {Netherlands},
	abstract = {Given the increasing complexity of Chip Multi-Processors (CMPs), a wide range of architecture parameters must be explored at design time to find the best trade-off in terms of multiple competing objectives (such as energy, delay, bandwidth, area, etc.) The design space of the target architectures is huge because it should consider all possible combinations of each hardware parameter (e.g., number of processors, processor issue width, L1 and L2 cache sizes, etc.). In this complex scenario, intuition and past experience of design architects is no more a sufficient condition to converge to an optimal design of the system. Indeed, Automatic Design Space Exploration (DSE) is needed to systematically support the analysis and quantitative comparison of a large amount of design alternatives in terms of multiple competing objectives (by means of Pareto analysis). The main goal of the MULTICUBE project consists of the definition of an automatic Design Space Exploration framework to support the design of next generation many-core architectures.},
	isbn = {978-94-007-1487-8},
	url = {http://dx.doi.org/10.1007/978-94-007-1488-5_4},
	author = {Silvano, Cristina and Fornaciari, William and Palermo, Gianluca and Zaccaria, Vittorio and Castro, Fabrizio and Martinez, Marcos and Bocchio, Sara and Zafalon, Roberto and Avasare, Prabhat and Vanmeerbeeck, Geert and Ykman-Couvreur, Chantal and Wouters, Maryse and Kavka, Carlos and Onesti, Luka and Turco, Alessandro and Bondi, Umberto and Mariani, Giovanni and Posadas, Hector and Villar, Eugenio and Wu, Chris and Dongrui, Fan and Hao, Zhang and Shibin, Tang}
}
@conference {117.MaAvVaYkPaSiZa10,
	title = {An industrial design space exploration framework for supporting run-time resource management on multi-core systems},
	booktitle = {Proceedings of Design, Automation and Test in Europe (DATE) Conference},
	year = {2010},
	month = {March},
	address = {Dresden, Germany},
	abstract = {Current multi-core design methodologies are facing increasing unpredictability in terms of quality due to the actual diversity of the workloads that characterize the deployment scenario. To this end, these systems expose a set of dynamic parameters which can be tuned at run-time to achieve a specified Quality of Service (QoS) in terms of performance. A run-time manager operating system module is in charge of matching the specified QoS with the available platform resources by manipulating the overall degree of task-level parallelism of each application as well as the frequency of operation of each of the system cores. In this paper, we introduce a design space exploration framework for enabling and supporting enhanced resource management through software re-configuration on an industrial multicore platform. From one side, the framework operates at design time to identify a set of promising operating points which represent the optimal trade-off in terms of the target power consumption and performance. The operating points are used after the system has been deployed to support an enhanced resource management policy. This is done by a light-weight resource management layer which filters and selects the optimal parallelism of each application and operating frequency of each core to achieve the QoS constraints imposed by the external world and/or the user. We show how the proposed design-time and run-time techniques can be used to optimally manage the resources of a multiple-stream MPEG4 encoding chip dedicated to automotive cognitive safety tasks.},
	author = {Mariani, Giovanni and Avasare, Prabhat and Vanmeerbeeck, Geert and Ykman-Couvreur, Chantal and Palermo, Gianluca and Silvano, Cristina and Zaccaria, Vittorio}
}
@conference {119.AvVaYkMaPaZaSi10,
	title = {Linking run-time management with design space exploration at multiple abstraction levels},
	booktitle = {Proceedings of the DATE{\textquoteright}10 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications},
	year = {2010},
	month = {March},
	address = {Dresden, Germany},
	abstract = {In present era of Multi-Processor System-on-Chip (MPSoC) embedded devices, to run multiple applications optimally (in terms of execution time and power consumption) is an enormous challenge. Embedded designers usually tackle this challenge by dividing it in two parts : at design-time Design Space Explorations (DSE) are performed to derive Pareto set of optimum operating points for each application and at run-time embedded device is monitored continuously to operate at one of the points in the derived Pareto set. Obviously run-time management relies heavily on accuracy of DSE. With growing complexity of embedded devices and with time-to-market pressures, at design-time, it is not trivial to derive the operating point Pareto set. On the other hand, at run-time, overhead introduced by a run-time management scheme should also not be high so as to minimally affect embedded device performance . We have developed techniques to tackle these embedded design issues. At design time, we use DSE with multiple simulators running at multiple abstraction levels to converge quickly to Pareto set of operating points. At runtime, to keep run-time overhead to a minimum, a hierarchical Runtime Resource Manager (RRM) is used with well-defined interfaces (services) between global and local resource managers. We applied our methodology on an embedded device having eight processor cores running multiple MPEG4 encoders. With our DSE methodology, we could derive Pareto set much quickly (as compared to full-space explorations). With our run-time schemes, overhead introduced by run-time manager was negligible.},
	author = {Avasare, Prabhat and Vanmeerbeeck, Geert and Ykman-Couvreur, Chantal and Mariani, Giovanni and Palermo, Gianluca and Zaccaria, Vittorio and Silvano, Cristina}
}
@conference {129.Sietal.ISVLSI11,
	title = {Multicube: Multi-objective design space exploration of multi-core architectures},
	booktitle = {ISVLSI 2010: IEEE Annual Symposium on VLSI},
	year = {2010},
	month = {July},
	pages = {488{\textendash}493},
	address = {Lixouri, Kefalonia - Greece},
	abstract = {Technology trends enable the integration of many processor cores in a System-on-Chip (SoC). In these complex architectures, several architectural parameters can be tuned to find the best trade-off in terms of multiple metrics such as energy and delay. The main goal of the MULTICUBE project consists of the definition of an automatic Design Space Exploration framework to support the design of next generation many-core architectures.},
	doi = {http://dx.doi.org/10.1109/ISVLSI.2010.67},
	author = {Silvano, Cristina and Fornaciari, William and Palermo, Gianluca and Zaccaria, Vittorio and Castro, Fabrizio and Martinez, Marcos and Bocchio, Sara and Zafalon, Roberto and Avasare, Prabhat and Vanmeerbeeck, Geert and Ykman-Couvreur, Chantal and Wouters, Maryse and Kavka, Carlos and Onesti, Luka and Turco, Alessandro and Bondi, Umberto and Mariani, Giovanni and Posadas, Hector and Villar, Eugenio and Wu, Chris and Dongrui, Fan and Hao, Zhang and Shibin, Tang}
}
@conference {118.CaVeStShCeLeAsMe10,
	title = {Trace-based KPN Composability Analysis for Mapping Simultaneous Applications to MPSoC Platforms},
	booktitle = {Proceedings of Design, Automation and Test in Europe(DATE) Conference},
	year = {2010},
	month = {March},
	address = {Dresden, Germany},
	abstract = {Nowadays, most embedded devices need to support multiple applications running concurrently. In contrast to desktop computing, very often the set of applications is known at design time and the designer needs to assure that critical applications meet their constraints in every possible use-case. In order to do this, all possible use-cases, i.e. subset of applications running simultaneously, have to be verified thoroughly. An approach to reduce the verification effort, is to perform composability analysis which has been studied for sets of applications modeled as Synchronous Dataflow Graphs. In this paper we introduce a framework that supports a more general parallel programming model based on the Kahn Process Networks Model of Computation and integrates a complete MPSoC programming environment that includes: compilercentric analysis, performance estimation, simulation as well as mapping and scheduling of multiple applications. In our solution, composability analysis is performed on parallel traces obtained by instrumenting the application code. A case study performed on three typical embedded applications, JPEG, GSM and MPEG-2, proved the applicability of our approach.},
	author = {Castrill{\'o}n, Jer{\'o}nimo and Vel{\'a}squez, Ricardo and Stulova, Anastasia and Sheng, Weihua and Ceng, Jianjiang and Leupers, Rainer and Ascheid, Gerd and Meyr, Heinrich}
}
@conference {120.ArMuPr10,
	title = {Using MARTE for Designing power Supply Section of WSNs},
	booktitle = {M-BED 2010: Proceedings of the 1st Workshop on Model Based Engineering for Embedded Systems Design (a DATE 2010 Workshop)},
	year = {2010},
	month = {March 12},
	address = {Dresden, Germany},
	abstract = {Probably the biggest issue while tackling Wireless Sensor Networks design has always been providing them with adequate power supplies. Energy Harvesting was proposed as an essential feature for Wireless Sensor Networks (WSN)s in many application fields when the amount of energy contained in a commercial battery does not allow fulfilling the required mission. Solar energy is the most widespread mechanism used to harvest energy of the environment because of its good power density. However it introduces a level of uncertainty on the amount of energy available in the system. In this paper we propose a high level methodology for designing the power supply section of sensor nodes. In particular we suggest how to use MARTE UML design language in order to collect requirements for the application and transform them into specifications of the power supply system. The framework we propose aims at validating the design by simulating appropriate scenarios.},
	author = {Argyris, Ioannis and Mura, Marcello and Prevostini, Mauro}
}
@conference {97.Silvanoetal09,
	title = {MULTICUBE: Multi-Objective Design Space Exploration of Multiprocessor Architectures for Embedded Multimedia Applications},
	booktitle = {Proceedings of the DATE{\textquoteright}09 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications},
	year = {2009},
	month = {April},
	address = {Nice, France},
	author = {Silvano, Cristina and Palermo, Gianluca and Zaccaria, Vittorio and Fornaciari, William and Zafalon, Roberto and Bocchio, Sara and Martinez, Marcos and Wouters, Maryse and Vanmeerbeeck, Geert and Avasare, Prabhat and Onesti, Luka and Kavka, Carlos and Bondi, Umberto and Mariani, Giovanni and Villar, Eugenio and Posadas, Hector and Wu, Chris and Dongrui, Fan and Hao, Zhang}
}
@conference {72.Ferrari2007,
	title = {Design exploration for an Ogg/Vorbis decoder for VLIW architectures},
	booktitle = {Workshop on Application Specific Processors (WASP {\textquoteright}07)},
	year = {2007},
	month = {October},
	address = {Salzburg, Austria},
	abstract = {Parallel processing architectures are set to be the dominating design approach for a plethora of application domains, mainly because of the eminent reach of the so-called power wall, and furthermore because of the evident gap between the application/software development growth and Moore{\textquoteright}s law. In this work a design space for an audio codec is explored, targeted at a VLIW architecture. The Ogg/Vorbis codec is first analyzed and optimized for exposing potential parallelism to the VEX tools for compilation and parallel architecture exploration. Furthermore, the use of custom instructions is assessed and important results are obtained by means of a modification on the toolchain to reveal dynamic profiling information},
	author = {Ferrari, Federico and Amador, Erick}
}
@conference {21.968073,
	title = {Efficient AES implementations for ARM based platforms},
	booktitle = {SAC {\textquoteright}04: Proceedings of the 2004 ACM symposium on Applied computing},
	year = {2004},
	pages = {841{\textendash}845},
	publisher = {ACM Press, New York, USA},
	organization = {ACM Press, New York, USA},
	address = {Nicosia, Cyprus},
	abstract = {The Advanced Encryption Standard (AES) contest, started by the U.S. National Institute of Standards and Technology (NIST), saw the Rijndael [13] algorithm as its winner [11]. Although the AES is fully defined in terms of functionality, it requires best exploitation of architectural parameters in order to reach the optimum performance on specific architectures. Our work concentrates on ARM cores [1] widely used in the embedded industry. Most promising implementation choices for the common ARM Instruction Set Architecture (ISA) are identified, and a new implementation for the linear mixing layer is proposed. The performance improvement over current implementations is demonstrated by a case study on the Intel StrongARM SA-1110 Microprocessor [2]. Further improvements based on exploitation of memory hierarchies are also described, and the corresponding performance figures are presented.},
	keywords = {advanced encryption standard (AES), ARM microprocessor, cache memories, code optimisation},
	isbn = {1-58113-812-1},
	doi = {http://doi.acm.org/10.1145/967900.968073},
	author = {Atasu, Kubilay and Breveglieri, Luca and Macchetti, Marco}
}
@article {15.AlGaSte2003,
	title = {An Application Level Synthesis Methodology for Multidimensional Embedded Processing Systems},
	journal = {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
	volume = {22},
	number = {11},
	year = {2003},
	month = {November},
	pages = {1457-1470},
	abstract = {The implementation of multidimensional systems in embedded devices is a major design challenge due to the high algorithmic complexity of the applications. The authors suggest a novel application-level synthesis methodology for those parts of the embedded application which are characterized by being Lebesgue measurable (the computation involved in signal and image processing systems is Lebesgue measurable). The synthesis methodology, based on perturbation analysis, supports the design of analog, digital, or mixed implementations at the very high level of the system design cycle. The outputs of the methodology are quantitative indications regarding the maximum performance loss tolerable by the subsystems composing the application. Such information, augmented with a stochastic description of the tolerated perturbations, can be related to lower synthesis levels and guide the designer toward the final implementation of the embedded device. The perturbation analysis is based on randomized algorithms for an effective evaluation of the performance loss of the computational flow once affected by behavioral perturbations and a Tabu-search-inspired optimizing algorithm for distributing the tolerable performance loss at the system output along the computational subsystems composing the possibly multidimensional processing.},
	keywords = {application-level synthesis, multidimensional systems, randomized algorithms, robustness analysis, tabu search, yield maximization},
	doi = {http://dx.doi.org/10.1109/TCAD.2003.818304},
	author = {Alippi, Cesare and Galbusera, Andrea and Stellini, Marco}
}
@conference {5.AlGaSte2002,
	title = {An Application Level Synthesis Methodology for Embedded Systems},
	booktitle = {ISCAS 2002},
	year = {2002},
	month = {May 26-29},
	pages = {473-476},
	address = {Scottsdale},
	abstract = {Time-to-market, cost and power consumption requirements are pushing research in embedded systems towards the development of sophisticated CAD environments. The paper suggests a novel synthesis methodology for embedded devices based on an application level perturbation analysis. The methodology is based on randomised algorithms for evaluating the effective performance loss of the computational flow induced by perturbations and a Tabu-search optimising algorithm for distributing the tolerable performance loss along the computational subsystems composing the computation.},
	doi = {http://dx.doi.org/10.1109/ISCAS.2002.1010743},
	author = {Alippi, Cesare and Galbusera, Andrea and Stellini, Marco}
}
