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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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Palermo, G., G. Mariani, C. Silvano, R. Locatelli, and M. Coppola, "Application-Specific Topology Design Customization for STNoC", DSD07, in proceedings of 10th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools (DSD 07), Lübeck, Germany, August 29-31, 2007.
Palermo, G., C. Silvano, V. Zaccaria, E. Rigoni, C. Kavka, A. Turco, and G. Mariani, "Response Surface Modeling for Embedded System Design Space Exploration", Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, New York, USA, Springer, 2011.
Palermo, G., G. Mariani, C. Silvano, R. Locatelli, and M. Coppola, "A Topology Design Customization Approach for (STNoC)", Nano-Nets 07, in proceedings of 2nd International Conference on Nano-Networks (Nano-Nets 2007)., Catania, Italy, September 24-26, 2007.
Palermo, G., G. Mariani, C. Silvano, R. Locatelli, and M. Coppola, "Mapping and Topology Customization Approaches for Application-Specific STNoC Designs", IEEE Proceedings of ASAP'07 - 18th International Conference on Application-specific Systems, Architectures and Processors, Montréal, Québec, Canada, July, 2007.
Paolieri, M., I. Bonesana, and M D. Santambrogio, "ReCPU: a Parallel and Pipelined Architecture for Regular Expression Matching", Proceedings of 15th Annual IFIP International Conference on Very Large Scale Integration {(IFIP-VLSI 07)},(best paper award), Atlanta, Georgia, USA, October 15-17, 2007.
Peña, J., A. Upegui, and E. Sanchez, "Particle Swarm Optimization with Discrete Recombination: An Online Optimizer for Evolvable Hardware", 1st NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2006), Istanbul, Turkey, June 16-18, 2006.
Pilato, C., K. Basu, M. Shayan, F. Regazzoni, and R. Karri, "High-Level Synthesis of Benevolent Trojans", Proceedings of the IEEE Design, Automation and Test in Europe Conference (DATE), 2019.
Pilato, C., F. Regazzoni, R. Karri, and S. Garg, "TAO: Techniques for Algorithmic Obscuration during High-Level Synthesis", Proceedings of the ACM/IEEE Design Automation Conference (DAC), 2018.
Pilato, C., and L. P. Carloni, "DarkMem: Fine-Grained Power Management of Local Memories for Accelerators in Embedded Systems", Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2018.
Pilato, C., P. Mantovani, G. Di Guglielmo, and L. P. Carloni, "System-Level Optimization of Accelerator Local Memory for Heterogeneous Systems-on-Chip", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 36, pp. 435-448, 2017.
Pilato, C., S. Garg, R. Karri, and F. Regazzoni, "Securing Hardware Accelerators: a New Challenge for High-Level Synthesis", IEEE Embedded Systems Letters, vol. 3, issue 10, pp. 77-80, 11/2017, 2018.
Pilato, C., S. Garg, K. Wu, R. Karri, and F. Regazzoni, "TaintHLS: High-Level Synthesis For Dynamic Information Flow Tracking", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, In Press.
Pilato, C., K. Basu, F. Regazzoni, and R. Karri, "Black-Hat High-Level Synthesis: Myth or Reality?", IEEE Transactions on Very Large Scale Integration Systems, In Press.
Pilato, C., "Bridging the Gap between Software and Hardware Designers Using High-Level Synthesis", Advances in Parallel Computing, 2018.
Piscitelli, R., S. Bhasin, and F. Regazzoni, "Fault Attacks, Injection Techniques and Tools for Simulation", Hardware Security and Trust: Design and Deployment of Integrated Circuits in a Threatened Environment, First edition; 2016: Springer, pp. 149-167, 2017.
Piscitelli, R., S. Bhasin, and F. Regazzoni, "Fault attacks, injection techniques and tools for simulation", 10th International Conference on Design Technology of Integrated Systems in Nanoscale Era DTIS 2015, Naples, Italy, IEEE, pp. 1-6, 04/2015.
Piscopo, G., M. Prevostini, and I. Stefanini, "UML System-Level Analysis and Design of Secure Communication Schemes for Embedded Systems", FDL'04, Lille, France, pp. 301-312, September 14-17, 2004.
Polian, I., G. Becker, and F. Regazzoni, "Trojans in Early Design Steps - An Emerging Threat", TRUDEVICE Final Conference (FCTRU’16), 2016.
Powolny, F., S. Burri, C. Bruschini, X. Michalet, F. Regazzoni, and E. Charbon, "Comparison of Two Cameras based on Single Photon Avalanche Diodes (SPADS) for Fluorescence Lifetime Imaging Application with Picosecond Resolution", International Image Sensor Workshop (IISW), Snowbird Resort, Utah, USA, June, 2013.
Prevostini, M., F. Balzarini, A N. Kostadinov, S. Mankan, A. Martinola, and A. Minosi, "UML-based specifications of an embedded system oriented to HW/SW partitioning: a case study", Languages for system specification: Selected contributions on UML, systemC, system Verilog, mixed-signal systems, and property specification from FDL'03, Norwell, MA, USA, Kluwer Academic Publishers, pp. 71-84, 2004.

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