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Filters: Author is Vittorio Zaccaria [Clear All Filters]
"Multicube: Multi-objective design space exploration of multi-core architectures", ISVLSI 2010: IEEE Annual Symposium on VLSI, Lixouri, Kefalonia - Greece, pp. 488–493, July, 2010.
"A Design Space Exploration Methodology Supporting Run-Time Resource Management for Multi-Processors System on-Chip", Proceedings IEEE SASP'09 - Symposium on Application Specific Processors, San Francisco, CA, USA, July, 2009.
"Meta-model Assisted Optimization for Design Space Exploration of Multi-Processor Systems-on-Chip", Euromicro Proceedings of DSD'09 - Conference on Digital System Design, Patras, Greece, August, 2009.
"Multicube Explorer - A Design Space Exploration Framework for Embedded Systems-on-Chip", Proceedings of the DATE'09 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, Nice, France, April, 2009.
"MULTICUBE: Multi-Objective Design Space Exploration of Multiprocessor Architectures for Embedded Multimedia Applications", Proceedings of the DATE'09 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, Nice, France, April, 2009.
"Multiprocessor System-on-Chip Design Space Exploration based on Multi-level Modeling Techniques", Proceedings of IEEE IC-SAMOS'09 - International Conference on Embedded Computer Systems: Architectures, MOdeling, and Simulation, Samos, Greece, July, 2009.
"Yield Enhancement by Robust Application-specific Mapping on Network-on-Chips", NoCArc'09: Proceedings of the Second International Workshop on Network on-Chip Architectures, New York City, USA, pp. 37–42, December, 2009.
"An Efficient Design Space Exploration Methodology for Multi-Cluster VLIW Architectures based on Artificial Neural Networks", Proc. IFIP International Conference on Very Large Scale Integration VLSI - SoC 2008, Rhodes Island, Greece, October 13-15, 2008.
"About the Performances of the Advanced Encryption Standard in Embedded Systems with Cache Memory", ISCAS 2003, Bangkok, pp. 145-148, May 25-28, 2003.
"A Methodology for efficient architectural exploration of energy-delay trade-offs for embedded systems", SAC 2003, Melbourne, pp. 672-678, March, 2003.
"Energy Estimation and Optimization of Embedded VLIW Processors based on Instruction Clustering", 39th Design Automation Conference, New Orleans, pp. 886-891, June 10-14, 2002.
"An Instruction-Level Methodology for Power Estimation and Optimization of Embedded VLIW cores", DATE 2002, Paris, pp. 1128, March 4-8, 2002.