"Evaluating the Impact of Environmental Factors on Physically Unclonable Functions",
International Symposium on Field-Programmable Gate Arrays FPGA 2016, Monterey, CA, USA, ACM New York, NY, USA, pp. 279, 02/2016.
"Evaluating Resistance of MCML Technology to Power Analysis Attacks Using a Simulation-Based Methodology",
Springer Transactions on Computational Science, vol. 5430, pp. 230–243, February, 2009.
"Area and Power Efficient Synthesis of DPA-Resistant Cryptographic SBoxes",
International Conference on VLSI Design & Embedded Systems, Bangalore, India, January 6-10, 2007.
"A Memory Unit for Priority Management in IPSec Accelerators",
proceedings of ICC07. Glasgow, Scotland: IEEE Communications Society, Glasgow, Scotland, June 24, 2007.
"Simulation-based Methodology for Evaluating DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies",
International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS IC 07), Samos, Greece, July 16-19, 2007.
"ASIC Hardware Implementation of the IDEA NXT Encryption Algorithm",
IEEE International Symposium on Circuits and Systems, Kos, Greece, May 21-24, 2006.
"Quasi-Pipelined Hash Circuits",
IEEE ARITH 17, Cape Cod, pp. 222-229, June, 2005.
"Small-scale Variants of the Secure Hash Standard",
ECRYPT workshop on RFID and lightweight cryptography, Graz, Austria, July 14-15, 2005.
"Speeding Security on the Intel StrongARM",
Embedded Intel Solutions, pp. 31-33, 2005.
"An ASIC design for a high speed implementation of the hash function SHA-256 (384, 512)",
GLSVLSI '04: Proceedings of the 14th ACM Great Lakes symposium on VLSI, Boston, MA, USA, ACM Press, New York, USA, pp. 421–425, 2004.
"The Design of a High Speed ASIC Unit for the Hash Function SHA-256 (384,512)",
DATE '04: Proceedings of the conference on Design, automation and test in Europe, Washington, DC, USA, IEEE Computer Society, pp. 30070, 2004.
"Efficient AES implementations for ARM based platforms",
SAC '04: Proceedings of the 2004 ACM symposium on Applied computing, Nicosia, Cyprus, ACM Press, New York, USA, pp. 841–845, 2004.
Method of implementing one-to-one binary function and relative hardware device, especially for a Rijndael S-box,
, no. US 10/816,791 -- EP 20030425211, 10/2004.
"About the Performances of the Advanced Encryption Standard in Embedded Systems with Cache Memory",
ISCAS 2003, Bangkok, pp. 145-148, May 25-28, 2003.
"Efficient Software Implementation of AES on 32-Bit Platforms",
CHES '02: Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems, London, UK, Springer-Verlag, pp. 159–171, 2003.
"Hardware Implementation of the Rijndael Sbox: a Case Study",
ST Journal of System Research, pp. 84-91, July, 2003.
Method and circuit for data encryption/decryption,
, no. US 09/974,705, April, 2003.
"Efficient C implementation of the ECC and AES cryptographic systems",
Technology Leadership Day - organized by the MicroSwiss Network, Fribourg, October 10, 2001.