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"Hardware Implementation of the Rijndael Sbox: a Case Study", ST Journal of System Research, pp. 84-91, July, 2003.
Method and circuit for data encryption/decryption, , no. US 09/974,705, April, 2003.
"ASIC Hardware Implementation of the IDEA NXT Encryption Algorithm", IEEE International Symposium on Circuits and Systems, Kos, Greece, May 21-24, 2006.
"Quasi-Pipelined Hash Circuits", IEEE ARITH 17, Cape Cod, pp. 222-229, June, 2005.
"Small-scale Variants of the Secure Hash Standard", ECRYPT workshop on RFID and lightweight cryptography, Graz, Austria, July 14-15, 2005.
Method of implementing one-to-one binary function and relative hardware device, especially for a Rijndael S-box, , no. US 10/816,791 -- EP 20030425211, 10/2004.