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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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Bol, D., C. Hocquet, and F. Regazzoni, "A Fast ULV Logic Synthesis Flow in Many-Vt CMOS Processes for Minimum Energy Under Timing Constraints", IEEE Transactions on Circuits and Systems II: Express Briefs , vol. 59-II, issue 12, pp. 947-951, 02/2012.
Bol, D., C. Hocquet, and F. Regazzoni, "A Fast ULV Logic Synthesis Flow in Many-Vt CMOS Processes for Minimum Energy under Timing Constraints", IEEE Transactions on Circuits and Systems II, vol. 59, issue 12, pp. 947-951, 2013.