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"Midori: A Block Cipher for Low Energy",
21st International Conference on the Theory and Application of Cryptology and Information Security ASIACRYPT 2015, vol. 9453, Auckland, New Zealand, Springer Berlin Heidelberg, pp. 411-436, 11/2015.
"Malware Threats and Solutions for Trustworthy Mobile Systems Design",
Hardware Security and Trust: Design and Deployment of Integrated Circuits in a Threatened Environment, First edition; 2016: Springer, pp. 149-167, 2017.
"Malicious Wave: a Survey on Actively Tampering Using Electromagnetic Glitch",
International Symposium on Electromagnetic Compatibility 2014, 08/2014.
"Low Cost Software Countermeasures Against Fault Attacks: Implementation and Performances Trade Offs",
5th Workshop on Embedded Systems Security (WESS), Scottsdale, Arizona, USA, October, 2010.
"Low Cost FPGA Implementations of the SHA-3 Finalists",
10th Smart Card Research and Advanced Application Conference (CARDIS), Leuven, Belgium, September, 2011.
"Lightweight AES-Based Authenticated Encryption",
Fast Software Encryption (FSE), Singapore, March, 2013.
"LEXCOMM: A low energy, secure and flexible communication protocol for a heterogenous body sensor network",
IEEE-EMBS International Conference on Biomedical and Health Informatics, Hong Kong, China, January, 2012.
"Lattice-based cryptography: From reconfigurable hardware to ASIC",
2016 International Symposium on Integrated Circuits (ISIC): IEEE, 12/2016.
"Jailbreak Imagers: Transforming a Single-Photon Image Sensor into a True Random Number Generator",
International Image Sensor Workshop (IISW), Snowbird Resort, Utah, USA, June, 2013.
"An Investigation of Sources of Randomness Within Discrete Gaussian Sampling",
IACR Cryptology ePrint Archive, vol. 2017, pp. 298, 2017.
"Inverse Gating for Low Energy Block Ciphers",
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2018.
"Interface Synthesis in Multiprocessing Systems-on-Chips",
IP Based SoC Design 2004, Grenoble, December, 2004.
"Interaction between Fault Attack Countermeasures and the Resistance against Power Analysis Attacks",
Fault Analysis in Cryptography: Springer Berlin Heidelberg, pp. 257-272, 2012.
"Instruction Set Extensions for secure applications",
Design, Automation Test in Europe Conference DATE 2016, Dresden, Germany, IEEE, pp. 1529-1534, 03/2016.
"High-Level Synthesis of Benevolent Trojans",
Proceedings of the IEEE Design, Automation and Test in Europe Conference (DATE), 2019.
"Harvesting the potential of nano-CMOS for lightweight cryptography: An ultra-low-voltage 65 nm AES coprocessor for passive RFID tags",
Springer Journal of Cryptographic Engineering, vol. 1, issue 1, 2011.
"Hardware/software partitioning of operating systems: a behavioral synthesis approach",
GLSVLSI '06: Proceedings of the 16th ACM Great Lakes symposium on VLSI, Philadelphia, PA, USA, ACM Press, New York, USA, pp. 324–329, 2006.
"Hardware/Software Partitioning and Interface Synthesis in Networks On Chip",
IP Based SoC Design 2005, Grenoble, France, December 7-8, 2005.
"HardwareScheduling Support in SMP Architecture",
Design, Automation and Test in Europe(DATE), Nice, France, April 16-20, 2007.
"Hardware Trojans for Inducing or Amplifying Side-Channel Leakage of Cryptographic Software",
2nd International Conference on Trusted Systems (INTRUST), Beijing, China, December, 2010.