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"FPGA Implementations of the AES Masked Against Power Analysis Attacks", 2nd International Workshop on Constructive Side-Channel Analysis and Secure Design (COSADE), Darmstadt, Germany, February, 2011.
"Fresh Re-Keying II: Securing Multiple Parties against Side-Channel and Fault Attacks", 10th Smart Card Research and Advanced Application Conference (CARDIS), Leuven, Belgium, September, 2011.
"Fresh Re-Keying: Security against Side-Channel and Fault Attacks for Low-Cost Devices", Proceedings of Progress in Cryptology - Africacrypt, Stellenbosch, South Africa, May, 2010.
Hardware scheduled SMP architectures, , no. US 11/947,278, 06/2008.
Hardware Security and Trust: Design and Deployment of Integrated Circuits in a Threatened Environment, , First edition; 2016: Springer, 2017.
"Hardware Trojans for Inducing or Amplifying Side-Channel Leakage of Cryptographic Software", 2nd International Conference on Trusted Systems (INTRUST), Beijing, China, December, 2010.
"HardwareScheduling Support in SMP Architecture", Design, Automation and Test in Europe(DATE), Nice, France, April 16-20, 2007.
"Hardware/Software Partitioning and Interface Synthesis in Networks On Chip", IP Based SoC Design 2005, Grenoble, France, December 7-8, 2005.
"Hardware/software partitioning of operating systems: a behavioral synthesis approach", GLSVLSI '06: Proceedings of the 16th ACM Great Lakes symposium on VLSI, Philadelphia, PA, USA, ACM Press, New York, USA, pp. 324–329, 2006.
"Harvesting the potential of nano-CMOS for lightweight cryptography: An ultra-low-voltage 65 nm AES coprocessor for passive RFID tags", Springer Journal of Cryptographic Engineering, vol. 1, issue 1, 2011.
"High-Level Synthesis of Benevolent Trojans", Proceedings of the IEEE Design, Automation and Test in Europe Conference (DATE), 2019.
"Instruction Set Extensions for secure applications", Design, Automation Test in Europe Conference DATE 2016, Dresden, Germany, IEEE, pp. 1529-1534, 03/2016.
"Interaction between Fault Attack Countermeasures and the Resistance against Power Analysis Attacks", Fault Analysis in Cryptography: Springer Berlin Heidelberg, pp. 257-272, 2012.
"Interface Synthesis in Multiprocessing Systems-on-Chips", IP Based SoC Design 2004, Grenoble, December, 2004.
"Inverse Gating for Low Energy Block Ciphers", Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2018.
"An Investigation of Sources of Randomness Within Discrete Gaussian Sampling", IACR Cryptology ePrint Archive, vol. 2017, pp. 298, 2017.
"Jailbreak Imagers: Transforming a Single-Photon Image Sensor into a True Random Number Generator", International Image Sensor Workshop (IISW), Snowbird Resort, Utah, USA, June, 2013.
"Lattice-based cryptography: From reconfigurable hardware to ASIC", 2016 International Symposium on Integrated Circuits (ISIC): IEEE, 12/2016.
"LEXCOMM: A low energy, secure and flexible communication protocol for a heterogenous body sensor network", IEEE-EMBS International Conference on Biomedical and Health Informatics, Hong Kong, China, January, 2012.
"Lightweight AES-Based Authenticated Encryption", Fast Software Encryption (FSE), Singapore, March, 2013.