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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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Author Title Type [ Year(Desc)]
Filters: Author is Marco Paolieri  [Clear All Filters]
2007
Mura, M., M. Paolieri, L. Negri, F. Fabbri, and M. Sami, "Power Modeling and Power Analysis for IEEE 802.15.4: a Concurrent State Machine Approach", Proceedings of CCNC 2007, Las Vegas, USA, January 11-13, 2007.
Paolieri, M., I. Bonesana, and M D. Santambrogio, "ReCPU: a Parallel and Pipelined Architecture for Regular Expression Matching", Proceedings of 15th Annual IFIP International Conference on Very Large Scale Integration {(IFIP-VLSI 07)},(best paper award), Atlanta, Georgia, USA, October 15-17, 2007.
Mura, M., and M. Paolieri, "SC2: State Charts to System C: Automatic Executable Models Generation", proceedings FDL07, Barcelona, Spain, September, 2007.
Mura, M., M. Paolieri, L. Negri, and M. Sami, "StateCharts to SystemC: a High Level Hardware Simulation Approach", Proceedings of GLSVLSI 2007, Stresa, Italy, March 11-13, 2007.
2008
Bonesana, I., M. Paolieri, and M D. Santambrogio, "An adaptable FPGA-based System for Regular Expression Matching", Proceedings of Design, Automation and Test in Europe (DATE) Conference, Munich, Germany, March 10-14, 2008.