]
"Efficient C implementation of the ECC and AES cryptographic systems",
Technology Leadership Day - organized by the MicroSwiss Network, Fribourg, October 10, 2001.
"Efficient AES implementations for ARM based platforms",
SAC '04: Proceedings of the 2004 ACM symposium on Applied computing, Nicosia, Cyprus, ACM Press, New York, USA, pp. 841–845, 2004.
"An eda-friendly protection scheme against side-channel attacks",
Design, Automation and Test in Europe (DATE), Grenoble, France, March, 2013.
"DRuiD: Designing Reconfigurable Architectures with Decision-making Support",
19th Asia and South Pacific Design Automation Conference (ASP-DAC), Singapore, 01/2014.
"Development cost and size estimation starting from high-level specifications",
CODES '01: Proceedings of the ninth international symposium on Hardware/software codesign, Copenhagen, Denmark, ACM Press, New York, USA, pp. 86-91, 2001.
"Detecting changes in sequences of attributed graphs",
2017 IEEE Symposium Series on Computational Intelligence (SSCI), Nov, 2017.
"Detecting changes at the sensor level in cyber-physical systems: Methodology and technological implementation",
2017 International Joint Conference on Neural Networks (IJCNN), May, 2017.
"The design space of the number theoretic transform: A survey",
2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, {SAMOS} 2017, Pythagorion, Greece, July 17-20, 2017 (Invited), 2017.
"Design Space Exploration of PISA Architecture For ONU Auto-discovery Process",
proceedings of 6th International Conference of Electrical Engineering (ICEENG), Cairo, Egypt, May 27-29, 2009.
"A Design Space Exploration Methodology Supporting Run-Time Resource Management for Multi-Processors System on-Chip",
Proceedings IEEE SASP'09 - Symposium on Application Specific Processors, San Francisco, CA, USA, July, 2009.
"Design of Fault Tolerant Network Interfaces for NoCs",
Proceedings of 14th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools (DSD'11), Oulu, Finland, September, 2011.
"The Design of a High Speed ASIC Unit for the Hash Function SHA-256 (384,512)",
DATE '04: Proceedings of the conference on Design, automation and test in Europe, Washington, DC, USA, IEEE Computer Society, pp. 30070, 2004.
"Design methodologies for securing cyber-physical systems",
2015 International Conference on Hardware/Software Codesign and System Synthesis CODES+ISSS, Amsterdam, Netherlands, IEEE, pp. 30-36, 10/2015.
"Design exploration for an Ogg/Vorbis decoder for VLIW architectures",
Workshop on Application Specific Processors (WASP '07), Salzburg, Austria, October, 2007.
"Design and Synthesis of Reusable Platforms with Programmable Interconnects",
UML-SoC 2005, Anaheim, California, pp. 43-48, June 12, 2005.
"A Data protection Unit for NoC-based Architecture",
CODES+ISSS 2007, in proceedings of the Fifth IEEE/ACM/FIP International Conference of Hardware/Software Codesign and System Synthesis (CODES+ISSS 2007), Salzburg, Austria, September 30, 2007.
"DarkMem: Fine-Grained Power Management of Local Memories for Accelerators in Embedded Systems",
Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2018.
"Cross-layer Design of Reconfigurable Cyber-Physical Systems",
Proceedings of Design, Automation and Test in Europe (DATE) 2017, 2017.
"Critical echo state network dynamics by means of Fisher information maximization",
2017 International Joint Conference on Neural Networks (IJCNN), May, 2017.
"Creating an Embedded Systems Program from Scratch: Nine years of experience at ALaRI",
Proceedings of the 2009 Workshop on Embedded System Education, Grenoble, France, October, 2009.