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"ASIC Hardware Implementation of the IDEA NXT Encryption Algorithm",
IEEE International Symposium on Circuits and Systems, Kos, Greece, May 21-24, 2006.
"Quasi-Pipelined Hash Circuits",
IEEE ARITH 17, Cape Cod, pp. 222-229, June, 2005.
"Hardware Implementation of the Rijndael Sbox: a Case Study",
ST Journal of System Research, pp. 84-91, July, 2003.
"Design Space Exploration of PISA Architecture For ONU Auto-discovery Process",
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"Predictive Analytics: A Shortcut to Dependable Computing",
Software Engineering for Resilient Systems, Cham, Springer International Publishing, 2017.
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IEEE International Conference on Ubiquitous Intelligence Computing / International Conference on Autonomic Trusted Computing (UIC/ATC), 9, 03/2012.
"OSCAR: an Optimization Methodology Exploiting Spatial Correlation in Multi-core Design Space",
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2PARMA: Proceedings of the Workshop on Parallel Programming and Run-time Management Techniques for Many-core Architectures, Hannover, Germany, February, 2010.
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Proceedings of IEEE IC-SAMOS'09 - International Conference on Embedded Computer Systems: Architectures, MOdeling, and Simulation, Samos, Greece, July, 2009.
"DRuiD: Designing Reconfigurable Architectures with Decision-making Support",
19th Asia and South Pacific Design Automation Conference (ASP-DAC), Singapore, 01/2014.
"Evaluating Run-time Resource Management Policies for Multi-core Embedded Platforms with the EMME Evaluation Framework",
Workshop on Parallel Programming and Run-time Management Techniques for Many-core Architectures, February, 2012.
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"Multicube Explorer - A Design Space Exploration Framework for Embedded Systems-on-Chip",
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"A Design Space Exploration Methodology Supporting Run-Time Resource Management for Multi-Processors System on-Chip",
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"Design Space Exploration for Run-Time Management of a Reconfigurable System for Video Streaming",
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"ARTE: an Application-specific Run-Time Management Framework for Multi-core Systems",
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