"SCV2: A model-based validation and verification approach to system-of-systems engineering",
System of Systems Engineering Conference (SoSE), 2015 10th: IEEE, 05/2015.
"The Certicom Challenges ECC2-X",
Workshop on Special Purpose Hardware for Attacking Cryptographic Systems (SHARCS), Lausanne, Switzerland, September, 2009.
"Breaking ECC2K-130",
IACR Cryptology ePrint Archive, vol. 2009, pp. 541, 11/2009.
"Topology Optimization of Wireless Localization Networks",
European Wireless 2016 , Oulu, Finland, 05/2016.
"Optimizing Sensor Nodes Placement for Fault-tolerant Trilateration-based Localization",
IEEE Pacific Rim International Symposium on Dependable Computing (PRDC), Zhangjiajie, China, 11/2015.
"Time of Flight Error Compensation for In-Tunnel Vehicle Localization",
The Fourth International Workshop on Pervasive Networks for Emergency Management, 2014 (PerNEM'14), Budapest, Hungary, IEEE, 03/2014.
"Compact Implementation and Performance Evaluation of Hash Functions in ATtiny Devices",
11th Smart Card Research and Advanced Application Conference (CARDIS), Graz, Austria, November, 2012.
"Towards Low Energy Stream Ciphers",
IACR Transactions on Symmetric Cryptology, In Press.
"Atomic-AES: A Compact Implementation of the AES Encryption/Decryption Core",
Proceedings of 17th International Conference on Cryptology in India (INDOCRYPT) 2016, 2016.
"Midori: A Block Cipher for Low Energy",
21st International Conference on the Theory and Application of Cryptology and Information Security ASIACRYPT 2015, vol. 9453, Auckland, New Zealand, Springer Berlin Heidelberg, pp. 411-436, 11/2015.
"Adaptable AES implementation with power-gating support",
International Conference on Computing Frontiers CF'16, Como, Italy, ACM Ney York, NY, USA, pp. 331-334, 05/2016.
"Efficient Configurations for Block Ciphers with Unified ENC/DEC Paths",
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust (HOST) 2017, 2018.
"Exploring Energy Efficiency of Lightweight Block Ciphers",
(IACR) Cryptology ePrint Archive, vol. 2015, 09/2015.
"Compact Circuits for Combined AES",
Journal of Cryptographic Engineering, In Press.
"Round gating for low energy block ciphers",
2016 IEEE International Symposium on Hardware Oriented Security and Trust, HOST, McLean, VA, USA, IEEE Computer Society, pp. 55-60, 05/2016.
"Exploring the energy consumption of lightweight blockciphers in FPGA",
International Conference on ReConFigurable Computing and FPGAs, ReConFig 2015, 2015, Rivera Maya, Mexico City, IEEE, pp. 1-6, 02/2016, 2015.
"Inverse Gating for Low Energy Block Ciphers",
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2018.
"Exploring Energy Efficiency of Lightweight Block Ciphers",
Selected Areas in Cryptography: 22nd International Conference (SAC)2015, vol. 9566, Sackville, NB, Canada, Springer, pp. 178-194, 08/2015.
"Simulation-Time Security Margin Assessment against Power-Based Side Channel Attacks",
(IACR) Cryptology ePrint Archive, vol. 2014, 05/2014.
"Exploring the Feasibility of Low Cost Fault Injection Attacks on Sub-Threshold Devices through an Example of a 65nm AES Implementation",
7th Workshop on RFID Security and Privacy (RFIDSec), Amherst, Massachussets, USA, June, 2011.