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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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Conference Paper
Ferrante, A., I. Kaitović, and J. Milosevic, "Modeling Requirements For Security-enhanced Design of Embedded Systems", ICETE SECRYPT, Vienna, Austria, ICETE, 08/2014.
Mura, M., F. Fabbri, and M. Sami, "Modelling the Power Cost of Security in Wireless Sensor Networks : the Case of 802.15.4", Proceedings of IEEE ICT08, Saint Petersburg, Russia, June, 2008.
Fiorin, L., G. Palermo, and C. Silvano, "A Monitoring System for NoCs", Proceedings of the Third International Workshop on Network on Chip Architectures (NoCArc'2010), Atlanta, Georgia, USA, December, 2010.
Alippi, C., S. Disabato, and M. Roveri, "Moving Convolutional Neural Networks to Embedded Systems: The Alexnet and VGG-16 Case", Proceedings of the 17th ACM/IEEE International Conference on Information Processing in Sensor Networks, Piscataway, NJ, USA, IEEE Press, 2018.
Fiorin, L., G. Palermo, and C. Silvano, "MPSoCs Run-Time Monitoring through Networks-on-Chip", The 2009 Conference on Design, Automation and Test In Europe (DATE'09), Nice, France, April/2009.
Mariani, G., G. Palermo, C. Silvano, and V. Zaccaria, "Multicube Explorer - A Design Space Exploration Framework for Embedded Systems-on-Chip", Proceedings of the DATE'09 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, Nice, France, April, 2009.
Zaccaria, V., G. Palermo, F. Castro, C. Silvano, and G. Mariani, "Multicube Explorer: An Open Source Framework for Design Space Exploration of Chip Multi-Processors", 2PARMA: Proceedings of the Workshop on Parallel Programming and Run-time Management Techniques for Many-core Architectures, Hannover, Germany, February, 2010.
Silvano, C., W. Fornaciari, G. Palermo, V. Zaccaria, F. Castro, M. Martinez, S. Bocchio, R. Zafalon, P. Avasare, G. Vanmeerbeeck, et al., "Multicube: Multi-objective design space exploration of multi-core architectures", ISVLSI 2010: IEEE Annual Symposium on VLSI, Lixouri, Kefalonia - Greece, pp. 488–493, July, 2010.
Silvano, C., G. Palermo, V. Zaccaria, W. Fornaciari, R. Zafalon, S. Bocchio, M. Martinez, M. Wouters, G. Vanmeerbeeck, P. Avasare, et al., "MULTICUBE: Multi-Objective Design Space Exploration of Multiprocessor Architectures for Embedded Multimedia Applications", Proceedings of the DATE'09 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, Nice, France, April, 2009.
Mariani, G., G. Palermo, C. Silvano, and V. Zaccaria, "Multiprocessor System-on-Chip Design Space Exploration based on Multi-level Modeling Techniques", Proceedings of IEEE IC-SAMOS'09 - International Conference on Embedded Computer Systems: Architectures, MOdeling, and Simulation, Samos, Greece, July, 2009.
Journal Article
Derin, O., E. Diken, and L. Fiorin, "A Middleware Approach to Achieving Fault-tolerance of Kahn Process Networks on Networks-on-Chips", International Journal of Reconfigurable Computing, vol. 2011, no. Article ID 295385: Hindawi, pp. 14 pages, February, 2011.
Regazzoni, F., S. Banik, A. Bogdanov, T. Isobe, K. Shibutani, H. Hiwatari, and T. Akishita, "Midori: (A) Block Cipher for Low Energy (Extended Version)", (IACR) Cryptology ePrint Archive, vol. 2015, 12/2015.
Alippi, C., S. Ntalampiras, and M. Roveri, "Model-Free Fault Detection and Isolation in Large-Scale Cyber-Physical Systems", IEEE Transactions on Emerging Topics in Computational Intelligence, vol. 1, pp. 61-71, Feb, 2017.
Bianchi, F. Maria, L. Livi, C. Alippi, and R. Jenssen, "Multiplex visibility graphs to investigate recurrent neural network dynamics", Nature-Scientific reports, vol. 7, pp. 44037-44049, 03/2017.

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