Export 37 results:
Author [ Title
] Type Year Filters: First Letter Of Title is M [Clear All Filters]
"Model-driven approach to design ICT infrastructure for precision farming",
17th IEEE Conference on Emerging Technologies and Factory Automation (ETFA), Kraków, Poland, IEEE Industrial Electronics Society, 09/2012.
"Model-Driven Evaluation of User-Perceived Service Availability",
Dependable Computing, vol. 7869: Springer Berlin Heidelberg, pp. 39-53, May, 2013.
"Model-Free Fault Detection and Isolation in Large-Scale Cyber-Physical Systems",
IEEE Transactions on Emerging Topics in Computational Intelligence, vol. 1, pp. 61-71, Feb, 2017.
"Modeling Requirements For Security-enhanced Design of Embedded Systems",
ICETE SECRYPT, Vienna, Austria, ICETE, 08/2014.
"Modeling Responsiveness of Decentralized Service Discovery in Wireless Mesh Networks",
MMB & DFT, vol. 8376: Springer International Publishing Switzerland, pp. 88-102, 2014.
"Modelling the Power Cost of Security in Wireless Sensor Networks : the Case of 802.15.4",
Proceedings of IEEE ICT08, Saint Petersburg, Russia, June, 2008.
"A Monitoring System for NoCs",
Proceedings of the Third International Workshop on Network on Chip Architectures (NoCArc'2010), Atlanta, Georgia, USA, December, 2010.
"Moving Convolutional Neural Networks to Embedded Systems: The Alexnet and VGG-16 Case",
Proceedings of the 17th ACM/IEEE International Conference on Information Processing in Sensor Networks, Piscataway, NJ, USA, IEEE Press, 2018.
"MPSoCs Run-Time Monitoring through Networks-on-Chip",
The 2009 Conference on Design, Automation and Test In Europe (DATE'09), Nice, France, April/2009.
"The MULTICUBE Design Flow",
Multi-objective Design Space Exploration of Multiprocessor SoC Architectures: Springer New York, pp. 3-17, 2011.
"Multicube Explorer - A Design Space Exploration Framework for Embedded Systems-on-Chip",
Proceedings of the DATE'09 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, Nice, France, April, 2009.
"Multicube Explorer: An Open Source Framework for Design Space Exploration of Chip Multi-Processors",
2PARMA: Proceedings of the Workshop on Parallel Programming and Run-time Management Techniques for Many-core Architectures, Hannover, Germany, February, 2010.
"Multicube: Multi-objective design space exploration of multi-core architectures",
ISVLSI 2010: IEEE Annual Symposium on VLSI, Lixouri, Kefalonia - Greece, pp. 488–493, July, 2010.
"MULTICUBE: Multi-Objective Design Space Exploration of Multi-Core Architectures",
VLSI 2010 Annual Symposium, vol. 105, Netherlands, Springer, pp. 47-63, 2011.
"MULTICUBE: Multi-Objective Design Space Exploration of Multiprocessor Architectures for Embedded Multimedia Applications",
Proceedings of the DATE'09 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, Nice, France, April, 2009.
"Multiplex visibility graphs to investigate recurrent neural network dynamics",
Nature-Scientific reports, vol. 7, pp. 44037-44049, 03/2017.
"Multiprocessor System-on-Chip Design Space Exploration based on Multi-level Modeling Techniques",
Proceedings of IEEE IC-SAMOS'09 - International Conference on Embedded Computer Systems: Architectures, MOdeling, and Simulation, Samos, Greece, July, 2009.