"Interface Synthesis in Multiprocessing Systems-on-Chips",
IP Based SoC Design 2004, Grenoble, December, 2004.
Method of implementing one-to-one binary function and relative hardware device, especially for a Rijndael S-box,
, no. US 10/816,791 -- EP 20030425211, 10/2004.
"A Methodology for Testing IPSec-based Systems",
SoftCOM 2004, Split, pp. 22-26, October, 2004.
"UML in an Electronic System Level Design Methodology",
UML-SOC'04, San Diego, California, pp. 47-52, June 6, 2004.
"UML Specifications Towards a Codesign Environment",
FDL'04, Lille, France, pp. 313-324, September 14-17, 2004.
"UML System-Level Analysis and Design of Secure Communication Schemes for Embedded Systems",
FDL'04, Lille, France, pp. 301-312, September 14-17, 2004.
"UML-based specifications of an embedded system oriented to HW/SW partitioning: a case study",
Languages for system specification: Selected contributions on UML, systemC, system Verilog, mixed-signal systems, and property specification from FDL'03, Norwell, MA, USA, Kluwer Academic Publishers, pp. 71-84, 2004.
"Application-Driven Optimization of VLIW Architectures: A Hardware-Software Approach",
RTAS '05: Proceedings of the 11th IEEE Real Time on Embedded Technology and Applications Symposium, Washington, DC, USA, IEEE Computer Society, pp. 128–137, 03/2005.
"Automatic Synthesis of the Hardware/Software Interface in Multiprocessor Architectures",
FDL'05 - Forum on Specification and Design Languages, Lausanne, Switzerland, September 27-30, 2005.
"Design and Synthesis of Reusable Platforms with Programmable Interconnects",
UML-SoC 2005, Anaheim, California, pp. 43-48, June 12, 2005.
"Flexible Power Modeling for Wireless Systems: Power Modeling and Optimization of two Bluetooth Implementations",
WOWMOM '05: Proceedings of the Sixth IEEE International Symposium on a World of Wireless Mobile and Multimedia Networks (WoWMoM'05), Washington, DC, USA, IEEE Computer Society, pp. 408–416, 2005.
"From a young academic institute a broad minded approach: the working and learning environment of the ALaRI Intranet tool (case study)",
MICROLEARNING 2005: Learning & Working in New Media Environments, Innsbruck, Austria, June 23-24, 2005.
"Hardware/Software Partitioning and Interface Synthesis in Networks On Chip",
IP Based SoC Design 2005, Grenoble, France, December 7-8, 2005.
"A Methodology for Bridging the Gap between UML and Codesign",
UML for SOC Design, Dordrecht, The Netherlands, Springer, pp. 119-146, 2005.
"Quasi-Pipelined Hash Circuits",
IEEE ARITH 17, Cape Cod, pp. 222-229, June, 2005.
"Small-scale Variants of the Secure Hash Standard",
ECRYPT workshop on RFID and lightweight cryptography, Graz, Austria, July 14-15, 2005.
"Speeding Security on the Intel StrongARM",
Embedded Intel Solutions, pp. 31-33, 2005.
"ASIC Hardware Implementation of the IDEA NXT Encryption Algorithm",
IEEE International Symposium on Circuits and Systems, Kos, Greece, May 21-24, 2006.
"Bridging the Gap between SysML and Design Space Exploration",
FDL'06 Proceedings, Darmstadt, Germany, pp. 389-394, September 19-22, 2006.
"COOPER: Towards A Collaborative Open Environment of Project-centred Learning",
proceedings to EC-TEL'06 conference, Crete, Greece, October 1-4, 2006.